Our team at Avnet is working on a new design now. As we go through the various review stages, I was reminded of something that every engineer developing a PCB with Xilinx should know.
Tip #1 -- Use Xilinx Documentation Navigator
Of course, every engineer automatically knows to download the device datasheet. Hopefully engineers are also aware of the Xilinx Documentation Navigator. You've probably been frustrated trying to keep up with datasheet updates, making sure to subscribe on the website to be notified if the page changes. With DocNav, that's not necessary as it can update to the latest for every datasheet, user guide, application note, etc. If you're not already using it, please check it out here:
https://www.xilinx.com/support/documentation-navigation/overview.html
With DocNav installed, the Catalog updated, and all files downloaded, I can sort on the specific device family that I'm using to see relevant material. Here's a view of DocNav with ZU+ highlighted. For the ZU+ MPSoC, several critical documents stand out, which I'll highlight in the image below. Normally, you look for THE datasheet, but with Xilinx, you get this in layers. All of the following are important to read and follow:
- Data Sheet: Overview
- Product Tables and Product Selection Guide
- Data Sheet: DC and AC Switching Characteristics
- PCB Design Guide
- Device Packaging and Pinouts Product Specification
- Technical Reference Manual
Tip #2 -- Study UltraFast Embedded Design Methodology
If you scroll down to the Methodology Guides section, you see the UltraFast Embedded Design Methodology Guide (UG1046). This is a specific version of UltraFast for Embedded designs.
Reading through the introduction of this document, you will see that it points you to UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949). This document describes what UltraFast is:
The Xilinx
UltraFast
design methodology is a set of best practices intended to help streamline the design process for today's devices.
I'm not sure anyone reads all these documents in their entirety. UG949 is 327 pages long and UG1046 is another 233 pages. However, we probably all should read them. As a minimum, at least explore the documents, review the web page, and watch a few videos.
https://www.xilinx.com/products/design-tools/ultrafast.html
https://www.xilinx.com/video/hardware/ultrafast-design-methodology-for-vivado-into.html
If you really want to deep dive through the video format, check out the Vivado QuickTake Playlist on YouTube with 145 videos. Notice that #1 on the list is the UltraFast Vivado Design Methodology.
https://youtube.com/playlist?list=PL35626FEF3D5CB8F2
Tip #3 -- Use the UltraFast Design Checklists
The UltraFast guides reference a couple different checklists. The first one is the Methodology Checklist that everyone should use:
UltraFast Design Methodology Checklist (XTP301)
The second checklist you should use is device specific. Pick the one that matches the architecture you have selected.
- 7 Series Schematic Review Recommendations (XMP277)
- Kintex UltraScale and Virtex UltraScale FPGAs Schematic Review Checklist (XTP344)
- UltraScale+ FPGAs and Zynq Ultrascale+ Devices Schematic Review Checklist (XTP427).
Summary
Those are my tips for today. It's a lot of information, but that's to be expected given the vast and powerful capabilities of the Xilinx devices. Be patient and make sure to budget enough time to learn the material and also to review your designs as you create them.
If all this is a bit overwhelming but you'd still like to use a Xilinx device, then I highly recommend you consider a SOM or SBC like Ultra96-V2 , UltraZed-EG , UltraZed-EV . You'll get a pre-defined board that's been validated to work. You can then focus on a Carrier or Mezzanine design to pull in your additional system-level features.