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  • Author Author: redcharly
  • Date Created: 25 Jul 2022 5:06 PM Date Created
  • Views 806 views
  • Likes 7 likes
  • Comments 0 comments
  • arty-s7
  • fpga
  • vivado
  • digilent
  • arty s7
  • verilog
Related
Recommended

My little Arty simulator

redcharly
redcharly
25 Jul 2022

Introduction

When I decided to participate in the "7 Ways to Leave Your Spartan-6 FPGA" contest, I knew it would take a lot of effort. The board is a really great piece of technology and it was an opportunity for me to get acquainted with FPGA technology.

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The aim is to acquire knowledge to update my students on a technology that is increasingly spreading, especially in the field of Artificial Intelligence. Obviously using a board of this type at school is impossible but it is important to be able to speak about the emerging technologies that maybe they will find in a couple of years during their university studies.
This short blog will tell about my first experience with the Digilent Arty S7-50.

Unboxing and software installation

As usual, the unboxing phase was very exciting as I was very curious. I had read a lot on this board and, I must say, it did not disappoint any expectations.
The first problem I had to face was to find the disk space to be able to install the software, in fact I am working away from my home and I cannot use my PC. Fortunately, my wife's notebook was enough to set up the software infrastructure.

{gallery}unboxing

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As for the first use of the card, I used the guide provided by Digilent (Getting started with Vivado) to create the first program.
The guide is very simple and full of screenshots that make the procedure easy to understand and implement. It also describes the software environment and the steps to get to the generation of the bitstream.

My little simulator

As for the first project using the Arty S7-50 board, I thought of creating a simple logic gate simulator: I will use the 4 switches of the board to be able to choose a type of logic gate and the 4 buttons to simulate the inputs (pressed "1", released "0").
The output will be displayed by the 4 LEDs, which will light up together to indicate a "1" output and remain off to indicate a "0" output.
Obviously my interest is, for now, to become familiar with the Arty S7-50 and the Vivado software. The project I propose is very trivial but, for me, simple experiences like this are necessary to start exploring the potentials of this board.

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In the realization of this project the works done by the contest participants have been of great help. In particular I have to thanks Javagoza for his numerous blogs which are really interesting and very well organized.
As for the preparatory phase of creating the project, I invite you to read the Digilent guide I mentioned above.
I want to tell some things that have bothered me, so that the reader does not make my mistakes:

  1. don't underestimate Digilent's warning about using path without spaces;
  2. use a good quality USB cable as the use of unsuitable cables leads to malfunctions and the board is not correctly recognized by the operating system.

Following the operations reported on the Digilent guide, in the end we will only have to write two files, the first is a configuration file (Arty-S7-50-Master.xdc) and you will have to substantially remove the comment symbols of the lines that we will need in the our project. The second file contains the actual code.
Here is the sv File:

module logic_gate(

    input wire logic [3:0] sw,
    input wire logic [3:0] btn,
    output     logic [3:0] led
    );

    always_comb begin

        if (sw[0] == 1 && sw[1] == 0 && sw[2] == 0 && sw[3] == 0) begin
            led[3:0] = (btn[0] && btn[1] && btn[2] && btn[3]) ? 4'b1111 : 4'b0000;
        end 

        if (sw[0] == 0 && sw[1] == 1 && sw[2] == 0 && sw[3] == 0) begin
            led[3:0] = (btn[0] || btn[1] || btn[2] || btn[3]) ? 4'b1111 : 4'b0000;
        end

        if (sw[0] == 0 && sw[1] == 0 && sw[2] == 1 && sw[3] == 0) begin
            led[3:0] = (btn[0] && btn[1] && btn[2] && btn[3]) ? 4'b0000 : 4'b1111;
        end 

        if (sw[0] == 0 && sw[1] == 0 && sw[2] == 0 && sw[3] == 1) begin
            led[3:0] = (btn[0] || btn[1] || btn[2] || btn[3]) ? 4'b0000 : 4'b1111;
        end
    end
endmodule

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Conclusion and future projects

In conclusion, I was able to get a taste of the potential of the Digilent Arty S7-50. I believe I have only seen a very small percentage of the potential of this board and I believe that in the coming months there will be many projects carried out by the community.
Now I want to take a small step forward and dedicate myself to the use of external sensors and the ADC with my Arty S7-50.



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