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Blog What Do You Think About Xilinx’s 16nm ZU1/2/3 InFO Package?
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  • Author Author: jafoste4
  • Date Created: 30 Jul 2021 8:15 PM Date Created
  • Views 2179 views
  • Likes 4 likes
  • Comments 1 comment
  • zynq® ultrascale+™ mpsoc
  • zedboard
  • avnet
  • xilinx
  • zynq mpsoc
  • xilinx fpga
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What Do You Think About Xilinx’s 16nm ZU1/2/3 InFO Package?

jafoste4
jafoste4
30 Jul 2021

Have you heard about Xilinx’s latest release in the 16nm line, the ZU1/2/3 InFO package? This package uses 60% less area and is roughly 70% thinner than standard Zynq UltraScale+ chip. InFO (for those that don’t know) stands for Integrated Fan-Out. This technology was developed by TSMC and expands on Fan-out wafer-level packaging. To sum up how this is done compared to previous packaging technology, the InFO silicon dies have their packaging grown into them instead of being diced up and placed into packages.

image

 

To name a few of the advantages offered by this Fan-Out package first, is better signal integrity due to the length of conductor between the IC and PCB. Second, the heat dissipation is easier to control due to the lack of packaging material allowing a more direct connection between a heatsink and the semiconductor. Third, probably the most obvious and significant is the reduction in size allowing for small complex PCB application enablement. Basically getting a lot for a little PCB space.

 

Of course, with all these added benefits there comes disadvantages along with it as well. One such disadvantage is the difficulty in repairing such a circuit due to the small size and potential for damaging the IC. An additional issue of course is the complexity of PCB design with such an IC. To design with this chipset your PCB layout resource needs to be skilled in High Density Interconnect (HDI) layout practices to support the microvias and 0.5mm pitch Xilinx BGA.  In addition to HDI techniques, edge bonding or board level underfill around the package are industry norms/requirements when designing with the InFO package. This edge bonding is an additional step that occurs during the manufacturing process. Another PCB consideration is what material is being used. A standard FR4 PCB is the most common PCB substrate, however when designing with InFO, dependent on trace lengths and high signaling rates, a more expensive substrate such as Nelco may be required. Theses PCB consideration cause additional PCB cost and layout resource time.

image

 

With these considerations in mind what kind of application do you find to be the best fit for such package?

  1. Camera/Vision
  2. Wearables
  3. Industrial Automation
  4. Medical Equipment
  5. Other?

 

Also what Zynq UltraScale+ Size is of most interest to you? ZU1/2/3? I have shared a chart below of available resources in each package.

  1. ZU1
  2. ZU2
  3. ZU3

image

 

Any feedback is appreciated thank you for reading!

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  • dhill972
    dhill972 over 2 years ago

    Hello jafoste4

    I have managed to confuse myself about HDI, and was hoping you can clear this up. 

    • Is HDI a PCB design technique or is it a PCB material? I have found conflicting documents on this on the web.
    • If it’s a technique when you mention FR4 in the article does that mean FR4 cannot be used on InFO package PCB because it cannot support HDI techniques?

    `Thanks!

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