Hi,
I am trying to interface a Raspberry Pi and the Arty S7-50 through the SPI bus. The SPI communications on the Raspberry Pi is written using Python and tested to be working by using scopes traces.
The Raspberry Pi is configured as Master and Arty-S7 need to be configured as slave.
I need help configuring the Arty S7 to listen to the SPI communication as a Slave Device. Are there any example Verilog codes for this ?
Thanks in advance.
Regards,