Arty S7 50 rev. B IO Standard issues

Question

I'm using Vivado 2020.2 and I used the Digilent information to add its boards to Vivado. I implemented a small system but when I tried use the dip switches I got the following error. 
 
 I checked the schematic and it shows dip_switches_4bits_tri_i[3] has 1V35 input, but I do not know how to solve this specific issue. The following illustrates the evidence

jugal · Answer

Are you using the correct constraints file ? (For Rev. B) 
 ## SW3 is assigned to a pin M5 in the 1.35v bank. This pin can also be used as
## the VREF for BANK 34. To ensure that SW3 does not define the reference voltage
## and to be able to use this pin as an ordinary I/O the following property must
## be set to enable an internal VREF for BANK 34. Since a 1.35v supply is being
## used the internal reference is set to half that value (i.e. 0.675v). Note that
## this property must be set even if SW3 is not used in the design.
set_property INTERNAL_VREF 0.675 [get_iobanks 34] 
 Try adding this constraint to your xdc file if it isnt already there.