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Why a value assigned to a the "BASEADDR" memory location in BRAM getting assigned to its next memory location automatically?

cbohra00627

Error

I am trying to assign values to local BRAM memory locations and reading it back. I am using the basic microcontroller preset given in Vivado. I assigned a value "0x758F" to the base address defined in the "xparameters.h". And then I tried to read back the content of the base memory and its giving the correct value. But I am not able to understand that when I check the content of the next memory location (i.e. BASEADDR + 1), it also shows the same value, but I didn't assign any value to this location. It can be seen in the terminal. Why is this happening? Does this mean that if I assign a value to a particular memory location, then the same value will get assigned to all the consecutive locations?

Base ADDR

When I tried to assign values to the (HIGHADDR - 1) address (value - 0xa894) and to (HIGHADDR) address (value - 0x8a46) and then tried to read these locations, it showed same value (i.e. 8A46) in both the locations. Again, I am not able to understand why is this happening?

If my approach to write to BRAM and read it is wrong then is there any better way to do so because the project I am trying to build requires writing to and reading from memory?

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    Do you have the memory cache feature enabled on the MicroBlaze block in your design? Check the Cache Line Size and  the Data Width. You may be doing reads not aligned with the defined sizes. You can try disabling caches if you need that kind of reads. Otherwise you will have to read in aligned address increments.

    I'm not an expert, it's my first contact with FPGAs, but I'd check that out. I don't know if what I've written makes any sense.

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    Do you have the memory cache feature enabled on the MicroBlaze block in your design? Check the Cache Line Size and  the Data Width. You may be doing reads not aligned with the defined sizes. You can try disabling caches if you need that kind of reads. Otherwise you will have to read in aligned address increments.

    I'm not an expert, it's my first contact with FPGAs, but I'd check that out. I don't know if what I've written makes any sense.

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