Snickerdoodle board on FLOSS Weekly

I haven't watched the video since most of my computers don't have sound hooked up, so this comment may already be addressed in the video:

Snickerdoodle has a very impressive price for a Zynq board, but what's it doing on FLOSS weekly?  Don't you have to use the proprietary Xilinx Vivado software to program the Zynq FPGA?

The closed toolchain is not ideal, but this is pretty much an universal problem for FPGA design.

I think FLOSS (Free/Libre/Open Source Software) is still relevant if a FPGA based project like this is releasing HDL "source code".

I've not gotten clarification on yet on whether their board is Open Source Hardware.  I hope that they will release schematics, PCB layout and BOM.  Could you comment, rcousins?

fustini We're going to be posting the schematics & BOM in the next week or two (just have a few final tweaks to make to the power supply subsystem that will further decrease the standby/sleep power consumption).

johnbeetem gdstew Of course, you could always synthesize an FPGA *in* the FPGA and run whichever open-source toolchain you'd like. While it's disappointing the tools aren't open, FPGAs are fundamentally the most open source silicon component you could ever ask for - you are in complete control over what the chip is doing at the gate level.

We can only make open the software that's in our control (with the two primary closed-source items being the FPGA toolchain and the TI radio firmware). There are numerous technical (and, of course, "business") reasons these companies haven't totally opened up these tools, but we don't really believe/have faith in the 'sit and wait' method when it comes to changing paradigms or corporate philosophies.

We just want to provide powerful tools for people to create and learn about new things. It's still possible to be a highly productive carpenter regardless of open/closed the designs of your hammer/saw/drill are. Ultimately, if enough people get this technology into their hands and truly want to affect change, we believe the "people" will find a way.

As an aside, if someone has an open FPGA toolchain that has been proven to work with Zynq, we're more than happy to try it out and see how we can support it.

-Ryan

Drew: I hope that they will release schematics, PCB layout and BOM.

Schematics and BOM definitely, never really understood the need for PCB layout unless there is a layout related problem. If there is, there is not much I can do to fix it

especially in today's 6 or more layer SBC world. Cloning ? I like seeing all the different products with different capabilities. This has not really hurt pricing competition

either as a lot of the competing SBCs' prices hover reasonably around the Raspberry Pi price and I recently bought a 1.6 GHz quad-core 1 GB Orange Pi PC for a little

less than 19 USD including shipping.

Ryan

After over 40 years I've learned to live the fact that certain things in the electronics industry are just going to be proprietary. As long as I can get good tools at reasonable prices,

which has always been the biggest problem I've had with proprietary tool sets, I can live with it. The Vivado Design Suite is free which is a very good price ! I haven't had time

to check out the licensing restrictions yet (won't really need it until March 2016) but i assume this is for non-commercial designs which is what I want to do for now anyway. I

would like to see open tool sets that would remove such restrictions available, I just don't think it is going to happen for certain products which include FPGAs and GPUs.

P.S. 99% FUNDED !!!!!!  20:41 CDT. I think we're going to make it

Ryan Cousins wrote:

 

John Beetem gdstew Of course, you could always synthesize an FPGA *in* the FPGA and run whichever open-source toolchain you'd like. While it's disappointing the tools aren't open, FPGAs are fundamentally the most open source silicon component you could ever ask for - you are in complete control over what the chip is doing at the gate level.

I understand that FPGA vendors are afraid to release their bitstream formats for reasons that seem good to them, and so their tools are therefore proprietary.  My objection is that some projects claim that they are FLOSS (Free-as-in-Liberty Open-Source Software) when a key component cannot be programmed with FLOSS tools.  BeagleBoard and BeagleBone are up front that the GPU is proprietary and cannot be programmed with FLOSS tools, but the GPU is a small part of BeagleBoard/Bone and many projects don't need it and can therefore be fully FLOSS.  Except for the GPU, there is enough information in the TI SoC tomes to write bare-metal applications.

RasPi is more of a stretch.  As I understand it, the Broadcom documentation doesn't really give you enough information to write your own operating system and you must reverse-engineer from the Linux source code and use a "binary blob" to boot the GPU.  OTOH, they do document the GPU but I haven't heard whether RasPi users have been successful writing their own GPU applications and integrating them into actual RasPis.

Yes, FPGAs are indeed powerful components but I don't agree with calling them an "open-source silicon component".  Yes, you can use them as a component of an OSHW design, but since you can't program them using a FLOSS toolchain (except for Lattice iCE40 thanks to the amazing IceStorm) you don't have any of RMS's "four freedoms".  If the proprietary tools don't give you the correct result, you can't go into the source code and figure out why.  You have to try a bunch of "black magic" and play with different ways of expressing a design at the source code level to cajole the software into doing the right thing.  This sort of nonsense is exactly what led RMS to his crusade.

"Synthesizing an FPGA in an FPGA" can be useful, but as far as I can tell it makes terribly inefficient use of silicon resources and you cannot get good performance.  I think my Flavia project Flavia: the Free Logic Array is a wonderful tool for teaching about programmable logic, since it's small and fast: you can recompile and download a small design in a second or two.  IMO that's awesome compared to the longueurs you face using proprietary tools -- assuming you have the patience to download them in the first place and get the license to work.  OTOH, Flavia is really only suitable for small projects.  You can do a much bigger project with a tiny Lattice iCE40-HX1K and IceStorm than you can do with Flavia and the much larger Xilinx Spartan-6 LX9.

Now, maybe there's a much better way to do an "FPGA within an FPGA".  However, I would think that if it were possible and practical we would have seen it by now.

I should also mention that Flavia and other projects that manipulate Xilinx bitstreams can only do so because of the availability of Xilinx Design Language (XDL): Taming the Wild Bitstream.  I think I read somewhere that XDL is no longer available with Vivado.  I don't know if there's a substitute for it.

johnbeetem By that logic, no ARM or x86 project or platform could *ever* be considered "FLOSS." Is anyone expecting ARM or Intel to provide the masks for their chips? How do you change the arrangement of the gates on the STM32 sitting on my desk? I'm a bit confused as to why FPGAs are somehow held to a different standard of "openness" than any other (closed) silicon component simply because they give you more granular control over the function and configuration of the chip. Oh, and the tools are free.

Ignoring that for a moment, Zynq has a hard ARM core and you can use any open source tool you'd like to do whatever you want with the microprocessor - the I/O are simply routed through the programmable fabric (using the same AXI busses as any other ARM uC/uP).

michaelkellett Hopefully a $55 board with an ARM processor, FPGA, and wireless falls into the category of 'low cost' - we've even taken care of the "talking to Xilinx" part for you

Thanks, gdstew! Fully funded this morning...

johnbeetem By that logic, no ARM or x86 project or platform could *ever* be considered "FLOSS." Is anyone expecting ARM or Intel to provide the masks for their chips? How do you change the arrangement of the gates on the STM32 sitting on my desk? I'm a bit confused as to why FPGAs are somehow held to a different standard of "openness" than any other (closed) silicon component simply because they give you more granular control over the function and configuration of the chip. Oh, and the tools are free.

Ignoring that for a moment, Zynq has a hard ARM core and you can use any open source tool you'd like to do whatever you want with the microprocessor - the I/O are simply routed through the programmable fabric (using the same AXI busses as any other ARM uC/uP).

michaelkellett Hopefully a $55 board with an ARM processor, FPGA, and wireless falls into the category of 'low cost' - we've even taken care of the "talking to Xilinx" part for you

Thanks, gdstew! Fully funded this morning...

The Zynq is not in the running re low cost FPGAs  (and isn't meant to be) - the Lattice parts are MUCH simpler, come in packages you can hand solder (at least some of them) and in volume can cost less than $1 - not aimed at the same market at all.

But the cost of using a Zynq or any other SOC FPGA isn't just money - in order to get it to do anything much (ie to make serious use of the processor) you need a full blown OS which implies many megabytes of code - which will be sourced from a third party somehow (free or whatever).

If the application needs all this that's fine but if you just want an FPGA you'll do better not to have to maintain all the other stuff. In a lot of my work we end up with an FPGA (small by X standards at between 8 and 35k LUTs) and a Cortex M4 micro - if the Zynq chip was free we still wouldn't use it because the total cost of building and maintaining the product would go up.

Finally, how can I put this nicely, when a snag occurs with a chip you need to talk directly to the people who made it - the last thing you need is someone else doing your talking.

Your board may well be very nice (it's certainly a cheap way of getting  a Zynq chip)  and I wish you well with it but the cost of actually doing anything is only dominated by the cost of a dev board in home/hobby projects.

MK

Ryan Cousins wrote:

 

John Beetem By that logic, no ARM or x86 project or platform could *ever* be considered "FLOSS." Is anyone expecting ARM or Intel to provide the masks for their chips? How do you change the arrangement of the gates on the STM32 sitting on my desk? I'm a bit confused as to why FPGAs are somehow held to a different standard of "openness" than any other (closed) silicon component simply because they give you more granular control over the function and configuration of the chip. Oh, and the tools are free.

ARM and x86 silicon is not software.  It's hardware.  It's proprietary hardware and nobody expects ARM or x86 to become OSHW.

However, ARM and x86 silicon are a hardware platform that can be used for FLOSS (Free-as-in-Liberty Open-Source Software).  The ARM and x86 intruction sets are published, including both assembly language and their binary codings.  So as a programmer, you can write FLOSS that runs on those platforms and when you distribute source code your users have the option of modifying your source code for their own needs and recompiling it for their hardware.

In addition, you can write a compiler for any language you want and generate ARM or x86 machine language.  You are not dependent on the chip maker.  You are not required to use (for example) PL/M for the x86 machine or (as a silly example) APL for the ARM.  You buy the chip, the manufacturer tells you what the instruction bits do, and you can write whatever software you want.  You have freedom.

You don't get that kind of freedom with FPGAs other than iCE40.  You can't write your own compiler because you don't know what the machine-language bits do.  You have to use the Free-as-in-Beer tools from the FPGA vendor.  If they don't do what you want there's nothing you can do about it.  Yes, that's adequate for the majority of FPGA users and you can produce useful chips -- I do this professionally as a free-lance FPGA designer.  But there are a bunch of things that are impractical.  My favorite example is reconfigurable computing: FPGA tool bottleneck stalls HPC.  Reconfigurable computing doesn't sell a lot of chips for an FPGA vendor, so there's no motivation for them to produce tools that support it.  If FPGAs supported FLOSS, that wouldn't be a problem: other people could create that software.  The fact that the bitstream formats are proprietary means that they can't, and an amazingly useful FPGA application is stalled.

I'm not asking Xilinx or any other FPGA vendor to provide masks, just like I don't expect Intel or ARM to document how they implement their instruction sets.  I just want to know how to set the bits in FPGA bitstreams to perform the functions documented in their architecture documentation.  That's all I need for FLOSS.

Hope this helps

ARM and x86 silicon is not software.  It's hardware.  It's proprietary hardware and nobody expects ARM or x86 to become OSHW.

 

However, ARM and x86 silicon are a hardware platform that can be used for FLOSS (Free-as-in-Liberty Open-Source Software).  The ARM and x86 intruction sets are published, including both assembly language and their binary codings.  So as a programmer, you can write FLOSS that runs on those platforms and when you distribute source code your users have the option of modifying your source code for their own needs and recompiling it for their hardware.

 

In addition, you can write a compiler for any language you want and generate ARM or x86 machine language.  You are not dependent on the chip maker.  You are not required to use (for example) PL/M for the x86 machine or (as a silly example) APL for the ARM.  You buy the chip, the manufacturer tells you what the instruction bits do, and you can write whatever software you want.  You have freedom.

Again, this part has an ARM processor.

<< "Synthesizing an FPGA in an FPGA" can be useful, but as far as I can tell it makes terribly inefficient

use of silicon resources and you cannot get good performance.

 

>> I'm not real big on this idea either for exactly the same reason.

Neither am I, but it *is* possible...and you can make it as proprietary or open as you'd like. I can almost taste the freedom.

<< If the proprietary tools don't give you the correct result, you can't go into the source code and figure out why.

 

>> I probably couldn't figure it out even if I had the source code. High speed logic routing and optimization

of large FPGA designs is beyond my skill set and I would venture a guess that it is beyond yours and most

other peoples' in the business as well.

Indeed. Unfortunately this is a slightly different situation than messing something up and just doing a 'core dump' and starting over. If you decide you're more qualified than the chip/tool designers (and their 100s of thousands/millions of hours of experience and their army of engineers) to figure out what they've been doing wrong all this time and you start fiddling with the timing/optimization of these parts at the gate level, you're about 1,000x more likely to do something that's going to result in screwing something up so badly that the parts gets so hot that they melt solder and fall off the PCB than you are to find a better solution - regardless of the warm fuzzies you might experience along the way.

On the other hand, it would be kinda cool to see...

Ryan,

I know, I know. I checked it out first thing this morning !! Now the really hard part, waiting for March 2016.

"you need a full blown OS which implies many megabytes of code"

With regards to the Zynq specifically this is actually a completely false statement. The free Xilinx tools are designed to target Linux, FreeRTOS and *bare metal* and will include C driver files for any peripherals you use (like configuring the DDR at startup etc.).   You can go right ahead and write a 5 line program in main.c and load/execute it over JTAG just like a microcontroller and w/o any operating system.   This is totally supported by Xilinx and in fact is the way that most of the tutorials at http://zynqbook.com are done.    This is no suprise as you need to keep in mind that the very serious industries in which Zynq is used don't just care about slapping 10 million lines of buggy "off-the-shelf" code into a Linux powered multimedia appliance so they can make the next 8 week product cycle deadline.

So if you have a closed-source binary bitstream for the FPGA that implements a GPU/DSP/accelerator and you openly provide the instruction set that that closed HDL source accelerator executes (Which is also synthesized with a closed source FPGA toolchain).

Then all of a sudden that would be open-source?

Because that's precisely how most semiconductor IP is deployed --- like the ARM or GPU on your RPi/Arduino/BeagleBone

But magically they are more "open source" than Zynq?

Hi Jamil,

You may have a great product, but your last two comments are quite rude. You only quoted a portion of the sentence, it actually said

"in order to get it to do anything much (ie to make serious use of the processor) you need a full blown OS" and that is the case.

Who has the time to re-write the tens of thousands of lines of code that are present in rich Linux libraries to run bare-metal?

To make intensive use of an application processor in a practical amount of time, you do need the support of a full-blown OS.

With all the associated problems of having a team to manage the OS, packages and build.

It seems a team-wide issue. Your colleague (Ryan) was also rude on hackaday to makers in general when he said (quote):

""I am coming to the realization (maybe a little too late) that “makers” really aren’t interested in building anything beyond a LED-enabled garage door opener or an automated cat feeder."

If makers are your target market, then you and your team might want to be polite to potential customers.

Someone else on hackaday said to Ryan "You should really have a friendlier person handling your social media presence. I know you probably didn’t intend it, but you kinda came off as a xyz".

shabaz In reference to the partial conversation you quoted, I subsequently apologized to this person on Hackaday

<<Hi xxx and everyone – I apologize. I haven’t slept much recently…or in a long time. I haven’t had a decent meal in weeks. I haven’t seen a lot of my closest friends in months. I literally wake up and do nothing but work on this project all day every day 7 days a week. It’s not a hobby or a past time. It’s my life. Needless to say, it means a lot to me.

I don’t expect everyone to agree with what we’re doing or find it interesting or really care about us or our project for that matter. I do occasionally let my frustration get the better of me when I hear people badmouthing or second-guessing our intentions, our ability, our dedication, and, in some cases, our integrity. And for that, I am sorry.

We have put more of our time, bodies, and souls into this than most would consider reasonable or even humanly possible. We’ve been told – and continue to be told – it’s a bad idea and that we should give up and do something different/easier for more reasons and by more people than I can count.

Ultimately, if we can’t get anyone else to buy into the *vision* of what we’re proposing to provide, there’s really no one to blame but ourselves. And if that’s that case, it’s just something we’ll have to live with.

So again, my apologies for coming off as a **. My emotions got the better of me.>>

Not sure if you've ever been part of a crowdfunding campaign or a public product launch but to say it's a stressful time would be a severe understatement. I got caught up in the moment (after taking countless personal and professional bashings for a product we'd just released into the wild a few days prior). The moment passed and I have since had dozens of fruitful and civil conversations with the folks at Hackaday and the folks here at Element, like yourself. Only time will tell how the maker audience receives our product, but we certainly hope the initial dream when we started on this project - of making professional-caliber development tools more accessible and usable for makers, students, and hobbyists so that they may take their projects to the next level and directly contribute to the next generation of great technological advances - comes to fruition.

And I'd have to politely disagree with your statement that this was being misrepresented:

"in order to get it to do anything much (ie to make serious use of the processor) you need a full blown OS" and that is the case.

in the sense that these two statements: "in order to get it to do anything much" and "to make serious use of the processor" contradict each other (or, at the very least, one does not imply the other). Maybe to "make serious use of the processor" typically does involve a full-blown OS. But it's just not true that you need a full blown OS to "get it to do anything much." Unless I am misunderstanding what you are saying or you see it differently?

Hi Ryan,

I'm not going to comment any more on the rest, but regarding the OS issue, everyone's opinion on what 'serious use' (which is how the text 'do anything much' was qualified in the original text) means could vary. Serious use means different things to different people, as does doing anything much. I interpret serious use as "using modern protocols, application frameworks and software services which by nature entail using many of the building blocks of the built-in SoC". These would in a lot of cases entail the use of an OS such as Linux in practice. And in other peoples opinion serious use may not mean the same thing at all.

Basically, a body of engineers would agree, and a body of engineers may disagree, and

there is no harm in that.

Which is why it is odd for someone to say it is a "completely false statement" in bold

and italics on this point.

Fair enough, shabaz. Not trying to beat this into submission or anything but (formatting aside), I think you gotta admit that "do anything much" is a generalization - and, contextually or not, it is actually not true. I totally appreciate that this particular comment was being made from one individual's point of view. But there are thousands (or more) of application examples taking full advantage of  uPs yet are not running any sort of OS (i.e. bare metal).

Naturally every system is different and different approaches to the same problem can be equally valid.