Data files for the FlaviaLP56 implementation of the Free Logic Array, described in Flavia: the Free Logic Array and Chapter 12 of The XXICC Anthology rev 0.0n. FlaviaLP56 is for the ValentF(x) LOGI-Pi FPGA board. To reduce chances of confusion, I recommend that you only install this file if you want to synthesize Flavia logic for the LOGI-Pi.
Flavia is part of XXICC. For more information on XXICC, see the 'blog post XXICC (21st Century Co-design) release 0.0n and XXICC's home page: xxicc.org.
This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 Unported License. To view a copy of this license, visit creativecommons.org/licenses/by-sa/3.0/. No warranty is expressed or implied.
Update 22 May 2015: FlaviaLP56 has only been tested on LOGI-Pi R1.2. It has not been tested on the LOGI-Pi-2, labeled R1.5.1. I haven't checked to see how LOGI-Pi-2 changes affect Flavia.
FlaviaLP56 also works on with XXICC (21st Century Co-design) release 0.0p. I've only tested it with the "use JTAG" option, using an Adafruit FT232H Breakout Board as a JTAG controller. You should be able to use "synthesis pinout". However, you cannot configure pull-up, pull-down, and keeper circuits on I/Os.
