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  • Author Author: kkazem
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GaN FET Reverse Conduction (Almost a Diode)

kkazem

GaN FETs have a conduction mode similar to a Silicon MOSFET's inherent reverse diode. In both cases (GaN and Silicon FETs), conduction typically happens when the Drain terminal's voltage is lower than the Source. In other words, when the Drain has a negative voltage on it with respect to the Source terminal. For the case of a Silicon MOSFET, there is indeed an inherent physical diode present that needs about -1V to turn on (Vds = -1V). Typically, the gate will be off (Vgs = 0) when this happens. Since, if the gate voltage is greater than a few volts (typically), the MOSFET will be on and it would be difficult to build up a negative Vds of 1 V in that case. The Silicon MOSFET's inherent diode, being a minority carrier device, has a slow turn-off as the stored charges must be swept out of the diode's junction before it can turn off. This is called the Reverse Recovery time. The Silicon MOSFET also has a slow turn-on, which is called the Forward Recovery time. The slow turn on and turn off when the diode conducts leads to high switching losses as the FET is neither fully on, nor fully off leading to a simultaneous high voltage and high current, causing high power dissipation for that time period.

With the GaN FET, also called a High Electron Mobility Transistor (HEMT), there is no inherent physical reverse diode and therefore, there are no minority carriers to slow things down nor to cause diode switching losses. The GaN FET, however, will behave like a Silicon MOSFET's inherent diode in that when the Drain is negative (VDS= negative voltage > Vth), and the Gate is off (Vgs = 0), the GaN FET will conduct as the function of the Drain and the Source effectively switch places, causing a positive Vgd and GaN FET turn-on. The GaN FET can conduct pretty well with both positive bias (Vds = positive) as well as with negative bias (Vds = negative) so long as the gate voltage is greater than the FETs threshold voltage. 

Although the GaN FET conducts with a negative Vds, and it therefore, acts like a diode, there is no actual diode, the effective forward voltage drop in the reverse conduction mode will be about 1.7 V or greater, depending on current and temperature.  Additionally, when the negative Vds voltage is removed, the effective diode turns off instantly, with zero reverse recovery time, which is a real advantage in DC-DC Converter circuits. 

The property of GaN FETs is important in circuits like a synchronous rectifier in a Buck converter, where the Vds of the lower FET goes negative during the deadtime. This is the time when the top and bottom FETs in a half-bridge structure are both off. The switching losses become much less with the GaN FET due to the zero reverse recovery time property.

For readers interested in more details, here's a link to EPC Co's, paper on GaN FET Characteristics: https://epc-co.com/epc/Portals/0/epc/documents/papers/eGaN%20FET%20Electrical%20Characteristics.pdf 

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  • in reply to kkazem

    It's a TI design. Two times 2 FETs in parallel (ga

    image

    image

    The layout and the foorprint:

    image

    The application note explains the principles: https://www.ti.com/lit/ug/snvu520b/snvu520b.pdf.

    I've dived in some detailed aspects:

  • in reply to Jan Cumps

    :Thank you for your comments and for the TI GaN design. I hadn't seen that before.
    There are a few things I found interesting about the design:

    1. The FETs are actually paralleled at the gates. One would never do this with Silicon MOSFETs as it can cause problems due to one of the two turning on slightly before the other. In this case, the GaN devices probably turn on so fast, it might not be an issue.

    2. I'm surprised the switching frequency isn't higher (more like 1-2 MHz) rather than 600 KHz. Although I used 500 KHz in my design for optimal efficiency. 

    3. The buck inductors are only 250 nH (1/4 of a microhenry). That's tiny, but it will allow a very fast ramp-up to full (50A) output current.

    4. It's using six (6) GaN FETs total in the design. For a buck converter at 50-75 watts, it seems excessive. I think TI is asking their application engineers to make designs that use a maximum number of TI devices for sales purposes. After all, that is the purpose of application engineers, to sell. Yes, they also can help customers with their design problems, but they're primarily there to support sales. Not that I think that's wrong, it is what it is. But us practicing engineers must take these app notes with a grain of salt. 

  • in reply to kkazem

    I also wanted to ask you what you use for schematics for blogs on this website. I'm using Altium Designer, but I have to export to either pdf or to AutoCAD dxf, then use photoshop to adjust the image shape thru the number of pixels in width and height. Is there any easier way that you know of?

    And similarly, for images, your's look pretty good and I'm wondering what sort of default pixel width and height (or range) you typically use on the Element14 website?

  • in reply to kkazem

    what you use for schematics for blogs on this website

    I use KiCAD.
    To make images for blog posts,

    • I zoom out until everything is clear. 
    • Take a screen print
    • Paste it in Paint
    • Cut away what I don't want / need. Sometimes I move things closer to each other at the same time, or make annotations.
    • I paste that into the blog edit window. I let the forum software deal with sizing

    for images, yours look pretty good and I'm wondering what sort of default pixel width and height (or range) you typically use on the Element14 website?

    I try to accept the defaults from the forum editor. Sometimes I resize an image to make it similar sized as the one above or below it. By dragging the lower right corner.

    My overall approach is to let the forum renderer do all of the work. I use the styles and mechanisms available. I rarely go to the <source code> block to make amendments. I never copy/paste preformatted text.

  • in reply to Jan Cumps

    ...

    For photos, I use an Android tablet or phone.
    Then I open the image in Paint, and use the Resize functionality to bring it down to a manageable size.
    For overviews, I resize to 25%. For detail photos to 33%

    Native size: 2006 * 4128 (72 dpi, 2.1 MB)
    33 %: 662 * 1363 (72 dpi, 358 kB)
    25 %:  502 * 1032 (72 dpi, 231 kB)

    I usually also crop to get a nice balance of the image