Quadrature Decoder with Logic Gates Circuit FPGA

Juan,

nice work!

This is an excellent example of how you can use the simple digital logic Components in PSoC Creator to make your own peripherals or functions, entirely in hardware!

In addition to the simple logic Components, PSoC Creator 3.0 now includes a full UDB editor with State Machines, making it very easy to create more complex digital hardware on the UDB hardware (Universal Digital Blocks = CPLDs + Datapaths on the PSoC).

Thanks Gagan!

I'll try to get something done with that feature sounds like a really great improvement!!

You can further offload the decoding by adding an up-down counter component.

Just use a single ISR to inform the processor of a change of value.

As DAB says - "Just a thought."

Great thought Compact! thanks!

Hi,

Just came across this after searching for simple quadrature decoding to up/down logic for a PSoC app.  Thanks for the schematic - implimented in under 5 minutes on a PSoC 5.  PSoCs really do rock!

Many thanks!

Thanks for posting - I do a lot of FPGA work but I don't use PSoCs,

It's not a very FPGA like use of logic - (but may be perfectly sensible for the limited CPLD style logic in a PSoC).

Why ?

Well, almost all (possibly all)  FPGAs are designed for synchronous logic and this is an asynchronous design (the flip flop is clocked by the XOR of the two inputs). In a very simple design like this it may be OK (but you can't tell what will happen if the two inputs change simultaneously) - in real FPGAs the timing verification tools can't work with asynchronous designs - so they are avoided because you can never be sure that they will work.

Do the PSoC tools offer simulation and any timing verification ?

MK

Yes!

There are clock domains on the PSoC and they can't be directly connected to standard logic connections. They have to be done properly in a controlled manner.

An alternative to the above circuit is to incorporate Gray Code verification and suitable FSM (Finite State Machine) to ensure that one bit can change at any one time to change states.

Surprisingly there are many consumer products that do not properly decode quadrature encoded switches. If you spin them to fast the product can get quite confused even incrementing in the wrong direction.

Sorrry have been away for quite some time, glad it helped you!, I believe there was some things to be checked with the interrupts.

I am not sure if it would work to solve the asynchronous logic but there is an option that allows you to sync the input signals with one single clock at 24MHz

Hi everyone..This is an excellent example of how you can use the simple digital logic Components in PSoC Creator to make your own peripherals or functions, entirely in hardwar. In addition to the simple logic Components,Psoc now includes a full UDB editor with State Machines, making it very easy to create more complex digital hardware on the UDB hardware.