This blog is part of a series of blogs which describe the development steps for an in-depth project tutorial.
This part of the tutorial describes how to create the Vitis Platform for our custom Kria App.
Building the Vitis Platform
In order to build the kv260_ispMipiRx_vcu_DP platform, simply invoke make as shown below:
$ cd $PROJ_DIR/kv260-vitis
$ make platform PFM=kv260_ispMipiRx_vcu_DP
After the build, the Vitis Platform will be located in the following location:
platforms/xilinx_kv260_ispMipiRx_vcu_DP_202110_1
Understanding the Vitis Platform
We already mentioned that the Vitis platform is a wrapper that defines the available resources for use by Vitis. We can query these resources with the platforminfo command:
$ cd $PROJ_DIR/kv260-vitis
$ platforminfo platforms/xilinx_kv260_ispMipiRx_vcu_DP_202110_1/kv260_ispMipiRx_vcu_DP.xpfm
==========================
Basic Platform Information
==========================
Platform: kv260_ispMipiRx_vcu_DP
File: .../kv260_ispMipiRx_vcu_DP.xpfm
Description:
kv260_ispMipiRx_vcu_DP
=====================================
Hardware Platform (Shell) Information
=====================================
Vendor: xilinx
Board: kv260_ispMipiRx_vcu_DP
Name: kv260_ispMipiRx_vcu_DP
Version: 1.0
Generated Version: 2021.1
Hardware: 1
Software Emulation: 1
Hardware Emulation: 1
Hardware Emulation Platform: 0
FPGA Family: zynquplus
FPGA Device: xck26
Board Vendor: xilinx.com
Board Name: xilinx.com:kv260:1.1
Board Part: XCK26-SFVC784-2LV-C
=================
Clock Information
=================
Default Clock Index: 0
Clock Index: 0
Frequency: 299.997000
Clock Index: 1
Frequency: 599.994000
Clock Index: 2
Frequency: 99.999000
==================
Memory Information
==================
Bus SP Tag: HP1
Bus SP Tag: HP3
Bus SP Tag: HPC1
Bus SP Tag: LPD
=============================
Software Platform Information
=============================
Number of Runtimes: 1
Default System Configuration: kv260_ispMipiRx_vcu_DP
System Configurations:
System Config Name: kv260_ispMipiRx_vcu_DP
System Config Description: kv260_ispMipiRx_vcu_DP
System Config Default Processor Group: smp_linux
System Config Default Boot Image: standard
System Config Is QEMU Supported: 1
System Config Processor Groups:
Processor Group Name: smp_linux
Processor Group CPU Type: cortex-a53
Processor Group OS Name: linux
System Config Boot Images:
Boot Image Name: standard
Boot Image Type:
Boot Image BIF: kv260_ispMipiRx_vcu_DP/boot/linux.bif
Boot Image Data: kv260_ispMipiRx_vcu_DP/smp_linux/image
Boot Image Boot Mode: sd
Boot Image RootFileSystem:
Boot Image Mount Path: /mnt
Boot Image Read Me: kv260_ispMipiRx_vcu_DP/boot/generic.readme
Boot Image QEMU Args: kv260_ispMipiRx_vcu_DP/qemu/pmu_args.txt:kv260_ispMipiRx_vcu_DP/qemu/qemu_args.txt
Boot Image QEMU Boot:
Boot Image QEMU Dev Tree:
Supported Runtimes:
Runtime: OpenCL
We can see that the following clocks and interconnects are available for use by Vitis:
- Clocks
- 300MHz
- 600MHz
- 100MHz
- High-Performance Interconnect
- LPD
- HP1
- HP3
- HPC1
This information will be important when configuring a Vitis Example or Overlay to be built with this Vitis platform.
Next Steps
The following blogs cover the previous development steps for this in-depth project tutorial.
The following blogs will cover the remaining development steps for this in-depth project tutorial.
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