Hello everyone.
Yesterday I received Arty S7 Board for the 7 Ways to Leave Your Spartan-6 FPGA contest.
Board is offered available in two variants differing in FPGA. We received the better variant with Spartan XC7S50 FPGA featuring 52160 logic cells, 2700 kilobits of RAM memory (after bits to bytes conversion it is 337.5 kilobytes), 120 DSP blocks and much more.
Board looks nice and is preloaded by demo featuring buttons, switches, LEDs and RGB leds.
I started with installing Vivado of course. Since I used Vivado last time it grown again, so I begin with cleaning disk for being able to install it. 
It requires 120 GiB of storage when installing and after installation it occupy almost 80 GiB of disk storage. WTF?!
After installing I of course tried to make my own simple demo for testing functionality of the board. So, I created simple verilog module blinking with led.
module led_test(input wire clk, input wire rst, output reg led);
reg [24:0] timer;
always @(posedge clk) begin
if (rst == 1) begin
led <= 1;
timer <= 0;
end else begin
if (timer >= 1000000) begin
led <= ~led;
timer <= 0;
end else begin
timer <= timer + 1;
end
end
end
endmodule
Then I deployed the code to the FPGA, and it worked well! So, I consider my board as functional and ready to make my project.
But before I start making my project, I need to complete blog posts about my experiments as part of Maxim Integrated Experimenting with Current Sense Amplifiers Design Chanllege. So, for next two weeks I will be quite about Spartan, but then I will come back, and I will post blogs about my project which I promised as part of application for this competition. Later I will connect some sensor to this board and finally I will make some experiment. So, thank you for reading this blog post and stay tuned.
