TTL to CMOS protection / recommendation

Question

Hi there,

I am creating an interface board for CNC equipment, the board will accept legacy parallel/TTL level inputs, however due to the need to support various devices I'll be using a CPLD or FPGA chip to allow custom configuration of each groups of boards.

I'm a little stuck as the 25 pin parallel port supports 17 signal pins and 1 ground pin, so looking for a recommendation for a low cost non-inverting buffer that can support that number of signal pins. The soul purpose of the buffer is to protect the 3.3v CMOS circuit from the potentially higher TTL voltages.

Xilinx recommend the MC74VHC1GT50 which is a small device, so looking for something of similar spec that can support the 17 signal pins. Would anyone have a recommendation for a device?

Many thanks

Paul

DAB · Accepted Answer

Why not use a Cypress Semiconductor Psoc 4? It allows you to use TTL, CMOS and a variety of interface levels under firmware control. Saves you a lot of circuitry and detailed wiring. DAB

Jan Cumps · Answer

I have a solution for 16 pins

The Gadget Factory 16 bit I/O buffer wing is open source. I've successfully used that design to make a Xilinx Spartan6 accept TTL level signals.

https://github.com/GadgetFactory/Papilio-Wings/tree/master/BPW5015-Buffer-Wing

johnbeetem · Answer

You can still get Xilinx XC9500XL series CPLDs. They're 3.3V devices with 5V-tolerant I/Os (assuming the CPLD is powered when you connect the 5V inputs). You can even get 44-pin PLCC devices which plug into prototype-friendly sockets with 0.1" pin spacing. The 2.5V - 3.3V Fairchild 74LXC244 and similar parts have 5V-tolerant inputs and allow hot swap. You can get these in prototype-friendly SOIC packages: https://www.fairchildsemi.com/datasheets/74/74LCX244.pdf

TTL to CMOS protection / recommendation

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