Can someone advise me on an FPGA? Needs 4 LVDS Receive channels @ 900Mbit/s....

Question

Hello all,

I've had my share of microcontrollers I worked with, but now I need to interface a high speed ADC, which outputs its 12-bit data at 900Mbit/s (450MHz). I can't ignore (or circumvent) FPGA's here, but I'm a bit daunted by the devices which are capapble of this. So far, I found the Lattice ECP3 family, Xilinx Spartan 6 and Altera Cyclone V devices to be able to do this.

However, these devices are very, very complicated, and I don't need much functionality apart from receiving and storing data for a couple of microseconds, and then slowly (could be UART!) transferring the data to a PC. Does anyone know a smaller (in pin count / real estate) device that can do this? I know I still have to figure out how to store my data, probably that's also going to be some LVDS storage(?).

I'd also be happy if anyone can tell me why smaller packages do not have the high-data-rate transceivers. Is that just market-driven, or am I overlooking something ?

Thanks for your help!

michaelkellett · Answer

I think it's a market thing - Lattice have ECP5 and MachX03 families in the pipeline which might be simpler but you can't easily get parts yet. Lattice ECP3 is viable and even the smallest device has 4 serdes channels. It's still 256 ball BGA for the lowest pin count part. There is no difference between working with the ECP3 or the simpler Lattice ice40 parts except that the tools for the ECP3 work better. I've done a lot with ECP3 (but not serdes) so might be able to help out if you go that way. MK

michaelwylie · Answer

I've had this exact problem. I was gathering data at 400 MHz from a TI ADC. I ended up using an Altera FPGA, but I used a 4 to 1 deserializer to split the stream into chunks that could be clocked at 100 MHz. The Altera deserializers can run up in the GHZ for sure.