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Forum Can someone advise me on an FPGA? Needs 4 LVDS Receive channels @ 900Mbit/s....
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Can someone advise me on an FPGA? Needs 4 LVDS Receive channels @ 900Mbit/s....

vsluiter
vsluiter over 11 years ago

Hello all,

 

I've had my share of microcontrollers I worked with, but now I need to interface a high speed ADC, which outputs its 12-bit data at 900Mbit/s (450MHz). I can't ignore (or circumvent) FPGA's here, but I'm a bit daunted by the devices which are capapble of this. So far, I found the Lattice ECP3 family, Xilinx Spartan 6 and Altera Cyclone V devices to be able to do this.

However, these devices are very, very complicated, and I don't need much functionality apart from receiving and storing data for a couple of microseconds, and then slowly (could be UART!) transferring the data to a PC. Does anyone know a smaller (in pin count / real estate) device that can do this? I know I still have to figure out how to store my data, probably that's also going to be some LVDS storage(?).

 

I'd also be happy if anyone can tell me why smaller packages do not have the high-data-rate transceivers. Is that just market-driven, or am I overlooking something ?

 

 

Thanks for your help!

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  • michaelkellett
    0 michaelkellett over 11 years ago

    I think it's  a market thing - Lattice have  ECP5 and MachX03 families in the pipeline which might be simpler but you can't easily get parts yet. Lattice ECP3  is viable and even the smallest device has 4 serdes channels. It's still 256 ball BGA for the lowest pin count part.

    There is no difference between working with the ECP3 or the simpler Lattice ice40 parts except that the tools for the ECP3 work better.

     

    I've done a lot with ECP3 (but not serdes) so might be able to help out if you go that way.

     

    MK

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  • vsluiter
    0 vsluiter over 11 years ago in reply to michaelkellett

    Thanks! As I understood, the ice40 does not have LVDS transceivers, and does not support (internal) clocks this fast. Can you confirm that?

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  • michaelkellett
    0 michaelkellett over 11 years ago in reply to vsluiter

    You need more than just LVDS, you need SERDES in hardware to get that 900MHz data down to FPGA fabric speed. Your 12 bit convertor is only supplying 75Msamples per second, on an ECP3 a 150MHz clock is feasible but it will be  a LOT easier to meet timing if you can get down to 75Mhz. The ice40 has no SERDES hardware and is not designed for speed.

     

    Which ADC are you using ?

     

    MK

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  • vsluiter
    0 vsluiter over 11 years ago in reply to michaelkellett

    Hello Michael,

    When and if I'll be making this design, it'll be something like Texas Instruments' AFE5803 or Analog's AD9670/AD9671 . I'd be happiest to have 14 bit data at 75MHz, but as far as I can see now, I could live with 12 bit at ~50MHz. The last option would require some more post processing.

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  • michaelwylie
    0 michaelwylie over 11 years ago

    I've had this exact problem. I was gathering data at 400 MHz from a TI ADC. I ended up using an Altera FPGA, but I used a 4 to 1 deserializer to split the stream into chunks that could be clocked at 100 MHz. The Altera deserializers can run up in the GHZ for sure.

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  • Kilohercas
    0 Kilohercas over 11 years ago

    ALtera cyclone 5 will be able to work at this speed. Also i has special serial transceivers
    5CGXFC3B7U15C8N Altera Corporation | Mouser

    only 900Mbps ? i can put more directly to ADSP-21489 without any FPGA ,just by PDAP interface with dma controller image (right now pushing 480Mbps data processing in real time, not just storing, but i will need to deserialize data to 16 bits)

     

     

    Tigershark does have 4LVDS (higher model 8)  channels capable 1GBps each, and you will get enormous data processing as bonus

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  • vsluiter
    0 vsluiter over 11 years ago in reply to Kilohercas

    Hi Linas,

     

    The amount of data is not the problem, it's more that I'd like to have a small solution, and something I can easily put together on a PCB. A Virtex5 is nice, but for my application I had something in mind that was a lot smaller because the NET amount of data is not that large. Somehow it does not seem right in my mind that I need to make such a complicated design (power supplies, serdes, configuration) for something this 'simple'.

     

    Thanks for the suggestion of the Tigershark, I'll look into that.

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