In Preparation for the AVNET MiniZed (Xilinx Zynq XC7Z007S SoC) RoadTest. What Do You Need?

I placed a purchase of one of these when they first came out and just received it yesterday but have not had the time to open it up yet.  I was looking to learn more about the Zynq SoC and Vivado and was not looking to spend $200 for a board, so this was perfectly priced.  Also, the built-in WiFi and BLE option was a huge plus considering I am looking at this for something like a IoT Gateway or Edge device.  I also wanted to learn about AMP, but since this board only has a single core ARM processor I'm not sure if that is possible.

I think was would be needed is a bit of understanding of how the ARM and FPGA features can leverage from each other and how these two features can be implemented.  A quick tour of Vivado would be nice, although there are some training material on the Xilinx site and Udemy.

Hello Jon,

A quick tour through Viavado is a bit like a quick tour through Africa - too much to take in.

I attended a 1 day workshop event put on by Avnet/Xilinx based on the Arty board. That was useful but should only be considered as a very basic flash through using the tool. I've been working with it for about 9 months now and there is still a lot I don't know !

Xilinx do publish a lot of good material and there is some useful stuff about ARM/FPGA interaction, but it's a minority interest requiring in depth understanding of the processor, designing with FPGA and the tools.

MK

I've read through everyone's comments, especially yours on training.

I'm wondering if it will be worthwhile to set up an Live Q&A Call with a FAE who can answer questions about programming the MINIZED, Zynq programming, etc.

I'd set it up as a tele-conference where the attendees could talk live to the FAE, with myself moderating?

If this sounds like something you and everyone who has responded would be interested in, I'll set up the event.

Thoughts (to anyone)

Randall

Randall,

As usual, you are the man of the great ideas! IMHO this is a great opportunity and better than a webinar where space for Q&A is always reduced and strictly related to the webinar slides / discussion.

I am just worried to have the time and good sources to read some documentation before this event.

If I can say, my answer is please, do it !

Enrico

Setting up a live Q&A could be problematic with the disparity of time zones.

Why not just set up a group where everyone can come in and ask their questions at their time and get the response by the best qualified to answer it.

Having a growing list would keep duplicate questions to a minimum and the answers will spur others to post new questions.

DAB

DAB, I almost disagree, it is my first impression. It is true that there is a time disparity but we can arrange an average time, I hope. The problem that I see with the pre-set questions is reaching a worst effect than a seminar. In this moment - just speaking of myself - I have no idea what to ask exactly, and probably for me and I suppose also many others, most of the good answers will come from the questions derived from the first questions etc. There is not a specific project to reach so it is possible to know before what it is well known and what it is not. I can prepare just a couple maybe three questions in this moment but I am sure that inside a discussion many other questions will arise. And I also suppose that someone else will ask questions that answer to mine and so on.

I should recognise that time shift maybe a problem.

Enrico

DAB, I almost disagree, it is my first impression. It is true that there is a time disparity but we can arrange an average time, I hope. The problem that I see with the pre-set questions is reaching a worst effect than a seminar. In this moment - just speaking of myself - I have no idea what to ask exactly, and probably for me and I suppose also many others, most of the good answers will come from the questions derived from the first questions etc. There is not a specific project to reach so it is possible to know before what it is well known and what it is not. I can prepare just a couple maybe three questions in this moment but I am sure that inside a discussion many other questions will arise. And I also suppose that someone else will ask questions that answer to mine and so on.

I should recognise that time shift maybe a problem.

Enrico

DAB

balearicdynamics

Let me tell you what I am thinking, my concerns.

The Minizad is a different kind of animal from what we have roadtested for the better part of the year of my managing the program. I don't want the meat of the 60 days of a roadtest to be only about coming up to speed with the architecture and the Zynq programming, etc. Some of you have already expressed an interested in a course or a webinar on FPGA programming. I want to be sure the roadtester community feels as comfortable with this dev board as is possible.

So, I could go the webinar route. But webinars have their limitations (aside from time zone issues). It's mostly lecture and the attendees don't always ask questions. This may have to do the fact that they are first being introduced to the material in the webinar.

This is why I opened this discussion. It has already revealed questions that you all have.

What if I created an event and posted as much of the documentation on the Minized that I can get and also asked the members who visited their page to ask questions they have and post them in the comments.

So, at the end of the enrollment period, I have hopefully 10 or 15 questions.

I give them to the FAE before the event so he/she can come prepared.

The event would be a tele-conference where everyone could speak to the FAE; I would just moderate to give some order when necessary.

In this way it would start with answering a few questions and then I would suspect it could (a) turn into a conversation between the attendees and the FAE and more questions would be offered; (b) I could coordinate the follow up to new questions.

Hopefully, this would be less lecture (because I posted info already and the attendee would need to review it beforehand) and more live interaction.

Ideally, everyone liked this we could offer it again. Of course, that would be based on the FAE's availability. I can't make any commitments yet since I haven't talked to an FAE since I just thought of this on the weekend. But this is what is on my mind.

Thoughts?

Randall

For me, this solution is perfect.

Enrico

Hello Randall,

I think this is a good idea and I'll support it, at least by offering helpful questions.

The problem is that the Zynq is a monster of a part and the very, very slow take up of it that Xilinx are experiencing (and others (Atmel, MicroSemi, Altera) also have had with similar parts) shows just how hard it is to get to grips with.

The project I'm involved with is taking a two step approach, the first is to move from Lattice XP3 to Xilinx Artix parts and the second step will be to absorb the two or more ARM processors on the same board into a Zynq style part. We expect this process to take about 30 months.

A newcomer to FPGA isn't going to get up to speed with this thing in 60 days. Someone experienced with FPGA and Linux might be able to but the value of the board is trivial to any commercial activity so to get a really good result you need a reviewer with lots of spare time, enthusiasm to play with this board and the required experience - I don't think you will get one.

So I think you should aim for the possible - which is that the provided examples are good enough for someone bright and keen to modify/hack one into a useful project. But they'll likely be skimming over most of the detail - like building a snowman on an iceberg.

MK

Michael Kellett wrote:

 

The problem is that the Zynq is a monster of a part and the very, very slow take up of it that Xilinx are experiencing (and others (Atmel, MicroSemi, Altera) also have had with similar parts) shows just how hard it is to get to grips with.

 

This is very interesting.  Do you have any links or is this what you hear from colleagues?

Zynq "in principle" would have been a good candidate for a company I consult for.  But they were very leery of changing from PowerPC to ARM, since PowerPC is big-endian and ARM is "usually" implemented as little-endian.  Zynq probably lets you choose between big-endian and little-endian for data access, but then you have to recompile libraries and you don't know which library functions might fail when you switch from little-endian to big-endian.  Getting endian wrong is one of the hardest things to debug, since it doesn't produce a run-time fault like a byte-alignment error.  Your code just gets the wrong answer, and figuring out where can be difficult.

Hi Randall,

I think that is a good approach.

Getting up to speed on FPGA capabilities is not a trivial task.

As others have pointed out, not everyone has the detailed electronic component and circuit design skills and knowledge that are required to become proficient with FPGA solutions.

Couple that with specific development tools and you greatly increase the amount of time needed for newbies to get up to speed and become proficient.

Speaking for myself, I have gone through the entire development of microprocessors, bit slice development, and the emergence of FPGA devices.  I have a degree in computer engineering in which I learned the hardware and software in great detail.

Even with that background, I am hesitant about picking up a new FPGA board, tackling the software and exploiting the device. 

Many years ago, I would have been up for the challenge, but not today, especially with my medical induced ADD issues.

So if someone with my background is apprehensive, I can well imagine self taught makers are just overwhelmed.

That was why I suggested a series of tutorials that would take the device through a series of Arduino like plug and play examples so that everyone can get a look at the design process, the development tool steps, and then demonstrating the final implementation.

I like what @Lucie Tozer did with the NEO board, so I would use her posts as sort of a starting point on what you need to do and how to present it.

Collecting questions and then holding a forum online is a good step.  My main concern is time zone differences across the membership.

DAB

Hello DAB,

As others have pointed out, not everyone has the detailed electronic component and circuit design skills and knowledge that are required to become proficient with FPGA solutions.

Couple that with specific development tools and you greatly increase the amount of time needed for newbies to get up to speed and become proficient.

IMHO who embark in a road test of this board (or similar) maybe a newbie in the FPGA world - I think that with this board we all are probably newbie or near to - but this means that there is at least the intention to test and learn and then go ahead with this approach managing FPGA. It is acceptable that then the road tester then decide to start playing with a different one for thousand of reasons but not a newbie in electronics. I think that also Randall consider this as one of the aspects; I think we can't expect an incredible participation of any kind of users. Just for the treated topic. But I think that it is a good way to move also in an unknown world. Despite the perplexity of the skilled users.

I like what did with the NEO board, so I would use her posts as sort of a starting point on what you need to do and how to present it.

And I totally agree with this point. Her posts together with some few other stuff here and around I think that this adventure is anyway a fascinating path. I  think I will enroll a road test of this kind. With a high risk factor, I should recognise.

Enrico