As an example, in UG949 (UltraFast Design Methodology Guide), Xilinx indicates:
If a reset is needed, Xilinx recommends code synchronous resets. Synchronous resets have many advantages over asynchronous resets.
Thank you for the great topic Whitney
Here's an idea for another topic : Flip-Flops versus Latches
Very well explained. Thanks Whitney for going a bit further with this explanation.