Collaborated with 
Path III is the third session in the element14 Community’s structured FPGA-based SoC training. The first Path was held in 2018 and focused on programmable logic devices PLDs and featured the AVNET MiniZed development board, based on AMD’s Zynq-7000 SoC.
Path II convened in 2019 and offered more advanced learning opportunities and featured the AVNET Ultra96-V2 development board, based on AMD’s Zynq UltraScale+ MPSoC.
Path III will double the fun by offering structured training on both the MiniZed and Ultra96-V2 boards. Each training track will be followed by a design/build phase.
- Getting Started with the AMD Spartan︎ UltraScale+︎ FPGA SCU35 Eval Kit
- PYNQ-Z2 Workshop Series: FPGA Experiments With Xilinx Pynq-Z2
- Power Integrity Effects on FPGA Functionality and Performance
- Leveling-Up Your FPGA Skills: An Expert Panel Discussion
- Getting Started with FPGAs: An Expert Panel Discussion
- Summer of FPGA: Software and FPGA: How to Get the Bits to Flip?
- Intro to Smart Embedded Vision (SEV) Using a PolarFire® FPGA
- Building Processor Based Systems on Lattice FPGAs Using Propel