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  • Author Author: Jan Cumps
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Programmable Electronic Load - Analyse the Summing Node Zero Point

This blog documents investigates the feedback node of the electronic load that , and are designing.

It's an important spot in the load's design. It measures the set point and the feedback from the output.

When the output is driven to 0, it should be on a potential as close as possible to 0 V.

On the first prototype it's -0.2 V. Not so much off, but the negative value  influences our ADC measurements.

This document checks how we can get this node to 0 V.

image

 

Because this document is evolving, some comments below may be out of sync with the content. That's because the content is adapted based on the conversation.

The measurements taken here are based on the original design, without R32 in place and U3B + tied to ground.

The current sense side of R7 is connected to ground, and a variable negative voltage from 0 V down is applied to the current sense side of R8 to simulate current being sensed.

 

The circuit isn't complex. The set point is driven by a DAC. It's set to 0 for this test.

The second input to this node is OpAmp 3C. It has both inputs tied to ground so should theoretically have 0 V at the output.

On my board I measure a potential of -0.212V at the left side of R33.

I hope to get this closer to 0 V to ease the ADC a bit - its performance degrades with negative voltage at its inputs.

Like the other blogs for the electronic load, this is a working document that will be updated with findings from anyone who wants to chime in.

 

Behaviour at 0V

 

buzy image

Parents

  • Been thinking about it some more, to add to my previous comments, if the inputs are static then the value at the summing junction will be static but if it is marginally off from 0V possibly due to the difference in value of the 2 100K resistors (Or did you put in 0.0000000000001% resistors image ), then the output of the integrator will ultimately drift one way or the other, it is designed to do this, its an integrator. so if the input measured value is not adjusting to reflect this change int he integrator output and that would be in an opposite direction to the error, it will continue to drift until it hits a supply rail or close to it.

     

    In summary, you cant measure the output of the integrator in a static test as no matter how hard you try, there will always be some error that will cause it to drift. a small error and slowly perhaps but still drift never the less

     

    I hope this will close this concern

    Peter

Comment

  • Been thinking about it some more, to add to my previous comments, if the inputs are static then the value at the summing junction will be static but if it is marginally off from 0V possibly due to the difference in value of the 2 100K resistors (Or did you put in 0.0000000000001% resistors image ), then the output of the integrator will ultimately drift one way or the other, it is designed to do this, its an integrator. so if the input measured value is not adjusting to reflect this change int he integrator output and that would be in an opposite direction to the error, it will continue to drift until it hits a supply rail or close to it.

     

    In summary, you cant measure the output of the integrator in a static test as no matter how hard you try, there will always be some error that will cause it to drift. a small error and slowly perhaps but still drift never the less

     

    I hope this will close this concern

    Peter

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