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Blog Recreate the Arty-S7 Out of Box design - part 2: MicroBlaze Firmware rebuild
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  • Author Author: Jan Cumps
  • Date Created: 11 Jul 2022 6:02 PM Date Created
  • Views 1097 views
  • Likes 8 likes
  • Comments 3 comments
  • summer of fpga
  • vitis
  • Spartan_Migration
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Recreate the Arty-S7 Out of Box design - part 2: MicroBlaze Firmware rebuild

Jan Cumps
Jan Cumps
11 Jul 2022

This is part 2 of the instructions to build the Arty-S7 Out-of-box experience from source. In part 1, I showed how to get the Vivado project created, and regenerate the FPGA design. That exercise delivers the full hardware design, but not the firmware to be loaded to the soft controller. In this post, we'll migrate the firmware from the 2017 SDK to Vitis.

Export Hardware and Create Vitis Platform project.

I'm not going to migrate the SDK project. I'm creating a new Vitis project, based on the Vivado design. To do that, I exported the hardware definition of the Vivado project from part 1. I included the bitfile, so that I can (re)load that to the FPGA from Vitis. In Vitis, I created a fresh workspace, and created a new Platform project based on the exported hardware definition. I chose standalone (bare metal). I built that project.

There's a bug in my version of Vitis, 2020.2. The make file for the PWM driver creates errors in the MicroBlaze version of the GNU archiver..
Xilinx published a solution, and indicate that a later version will fix this. javagoza uses PWM in his bot and doesn't mention this bug. So  seems that his version of the tool chain fixed it.
I used Method 2 described in the Xilinx app note.

Error: mb-ar.EXE: *.o: Invalid argument
Solution: apply the Xilinx solution to microblaze_0\standalone_domain\bsp\microblaze_0\libsrc\PWM_v1_0\src\Makefile

Create Application project

Then, I created an Application project for that MicroBlaze. I based it on the Vitis HelloWorld example. After checking that it compiles, I deleted helloworld.c, and copied OoB-Demo-2017.2.1-1/source/Arty-S7-50-base/sdk/oob_demo/src/led_demo.c into the project's source folder. I rebuilt the project.

image

Test Firmware with Vitis Debugger

You can directly "Flash" the firmware to the microblaze from Vitis. If the Vivado bitstream is not loaded to the board yet, you can first do that from Vitis, via the Xilinx -> Program device menu option.
Then load the firmware. You can do this via Debug As -> Launch Hardware. This will load the debugger. Click start to run the firmware. You can set breakpoints, to verify if it's really your code that's running:
image

Associate Firmware with Microblaze

The last step is done in Vivado. We tell the MicroBlaze that it has to load the firmware we just generated.
Go to the block diagram, and right-click on the MicroBlaze block. Then select Associate ELF files...

image

Regenerate bitstream and load the OoB design including firmware

In Vivado, you can now regenerate the bitstream and send it to the FPGA via the hardware manager. If you want to load it to Flash again, check javagoza's instructions: How to Store MicroBlaze Program in the Quad-SPI Flash from Vivado.

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  • javagoza
    javagoza over 3 years ago

    In my bot I'm not using the PWM module from the Digilent's Vivado Library. Instead I'm using the PWM feature of the Xilinx IP AXI Timer/counters

    https://www.xilinx.com/products/intellectual-property/axi_timer.html

    image

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  • Jan Cumps
    Jan Cumps over 3 years ago in reply to javagoza

    javagoza, when you load a bitstream in Vivado, with an ELF file associated to the Blaze, does it start executing automatically?

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  • javagoza
    javagoza over 3 years ago in reply to Jan Cumps

    No, you have to press the PROG button.

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  • javagoza
    javagoza over 3 years ago in reply to Jan Cumps

    No, you have to press the PROG button.

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