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Threads
462 Discussions
Frequently Asked
AVNET Xilinx RFSoC Gen1 Kit for LTE: Invalid Mixer mode in XRFdc_SetMixerSettings
Answered
over 2 years ago
Petalinux 2021.2 and TFTP server address
Not Answered
over 3 years ago
Ultra 96 Xilinx ZYNQ UltraSCALE Software and Installation Support
Not Answered
over 3 years ago
How to program Axi SPI using Arty7 - 35T
Not Answered
over 3 years ago
Does changing RX lane rate between 300 and 600 Mbps change RX CSI-2 MIPI D-PHY IP topology (HDL code of soft IP)? Good Day Dear , In our UlraScale+ based project we utilize RX MIPI D-PHY (4.2) which...
Not Answered
over 3 years ago
Using Xilinx Tools Forum
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Simuating a Zynq PS-PL system designed in Vivado
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756
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2
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Latest
over 9 years ago
by
Former Member
Answered
PetaLinux 15.4 and MicroZed BSP
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over 9 years ago
by
Former Member
Not Answered
u-boot-xlnx: compilation error
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300
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over 9 years ago
by
zedhed
Not Answered
Vivado 2015.4 + Petalinux 2015.4 on MicroZED
0
405
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4
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over 9 years ago
by
zedhed
Not Answered
Vivado Generate Bitstream (*.bin) with byte-swap
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over 9 years ago
by
starbright
Answered
Creating an Ext3 or Ext4 Filesystem with PetaLinux
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over 9 years ago
by
Former Member
Not Answered
How to measure the power consumption of an application on zedboard
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588
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3
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over 9 years ago
by
Former Member
Not Answered
Bootgen Error
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887
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3
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over 9 years ago
by
Former Member
Not Answered
Can't program second Zedboard
0
313
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1
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over 9 years ago
by
Former Member
Not Answered
LVDS Clock Input Buffer
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730
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over 9 years ago
by
zedhed
Not Answered
Trying to get jtag uart working on Microzed
0
1078
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over 9 years ago
by
Former Member
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Debugging PL on Zynq
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402
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over 9 years ago
by
raymadigan
Not Answered
32 bit address allocation of BRAM problem in Viivado
0
425
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1
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Latest
over 9 years ago
by
bhfletcher
Not Answered
Vivado GND assignments
0
357
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1
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over 9 years ago
by
drozwood90
Not Answered
Failure to program FPGA - Zedboard
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1869
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5
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over 9 years ago
by
Former Member
Not Answered
U-boot write to flash
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571
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1
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Latest
over 9 years ago
by
bhfletcher
Not Answered
HLS Floating point operation gives error when programming xillybus ip-core
0
360
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1
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Latest
over 9 years ago
by
drozwood90
Answered
FAQ: Why are there warnings when I Synthesize and/or Implement my design?
0
430
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2
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Latest
over 9 years ago
by
satishkumar
Not Answered
Vivado And SDK on Ubuntu 14.04.2 LTS
0
531
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3
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Latest
over 9 years ago
by
Former Member
Not Answered
XPS can't import or add path
0
251
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1
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Latest
over 9 years ago
by
Former Member
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