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Blog XXICC (21st Century Co-design) release 0.0p
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  • Author Author: johnbeetem
  • Date Created: 16 May 2015 3:22 AM Date Created
  • Views 1068 views
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  • Comments 2 comments
  • galaxc
  • flavia
  • xxicc
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XXICC (21st Century Co-design) release 0.0p

johnbeetem
johnbeetem
16 May 2015

Update 28 June 2015: XXICC has been updated to XXICC (21st Century Co-design) release 0.0q


Here is the release 0.0p of XXICC.  There is no rev 0.0o since the letter O looks too much like the digit 0.  0.0p adds a Flavia implementation for the Gadget Factory Papilio DUO board, which has a Xilinx Spartan-6 LX9 FPGA and an Arduino-compatible Atmel ATmega32U4.  Flavia 0.0p also adds pinout tables to map top-level ports and signal names to FPGA pins.  You can also specify pull-up, pull-down, and keeper circuits for FPGA I/Os.

 

0.0p is a “partial” release specifically intended to support the author’s element14 ’blog Raspberry Pi 2 meets Papilio DUO.  To get this ’blog published in a timely fashion, we chose to defer some features to next release: see the release notes.

 

XXICC (21st Century Co-design) is a not-for-profit research project which attempts to bring digital hardware/software co-design into the 21st Century using an improved programming language and a Reduced Software Complexity philosophy.  Its goal is to make it easier and more enjoyable to write and maintain digital hardware and software. XXICC is pronounced "Chicken Coop", so-called because it has so many layers.

 

For an overview of XXICC, see the xxicc.org home page and wiki.  For details on the GalaxC programming language, XXICC Object Editor, and GalaxC extensions for Hardware Design (GCHD), here are the latest documents and source code.

 

Release notes for XXICC rev 0.0p

Programming in the GalaxC Language rev 0.0j: reference and user guide for the GalaxC programming language, unchanged for 0.0p.

The XXICC Anthology rev 0.0n: collection of miscellaneous XXICC topics, including user guides for the XXICC Object Editor, GCHD and Flavia.  No changes for 0.0p: see Raspberry Pi 2 meets Papilio DUO for Papilio DUO and synthesis pinout table.

Data files for FlaviaPD59 release 0.0p: Data files for the FlaviaPD59 implementation of the Free Logic Array for the Papilio DUO.

Data files for FlaviaLP56 release 0.0p: Data files for the FlaviaLP56 implementation for the ValentF(x) LOGI-Pi.

Data files for FlaviaLB56 release 0.0p:  Data files for the FlaviaLB56 implementation for the ValentF(x) LOGI-Bone.

Taming the Wild Bitstream (unchanged for 0.0p): Supplement to Flavia: the Free Logic Array.

XXICC code release 0.0p: all source code for XXICC.

XXICC source code listing rev 0.0p: source code listing as PDF.

Release 0.0p does not including XXICC executable binaries: you must build the executable from source code.

GalaxC sample/demo programs rev 0.0k: sample GalaxC programs and GCHD logic libraries, unchanged for 0.0p.

GalaxC sample/demo program listings rev 0.0k: PDF listing of the sample GalaxC programs and GCHD examples, unchanged for 0.0p.

Installing and Running XXICC rev 0.0p: Document describing how to install and run XXICC.

Compiling and Running GalaxC Programs rev 0.0k: Document describing how to compile and run your own GalaxC programs, unchanged for 0.0p.

 

I've tested XXICC 0.0p on GNU/Linux (Ubuntu on x86 PC, Raspberry Pi Debian "Wheezy", and ODROID-C1 Ubuntu).  My main machine is Ubuntu, so the others are more likely to have anomalies.  Constructive comments and suggestions are most welcome.  I'd especially like to find out how to reproduce some of the bugs that have been eluding me.

 

XXICC is a FLOSS (Free as in Liberty Open Source Software) project.  Software is licensed under GPLv3 and other content is licensed under Creative Commons CC-BY-SA 3.0.

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  • johnbeetem
    johnbeetem over 10 years ago

    I just uploaded FlaviaLP56 rev 0.0p data files for the LOGI-Pi rev R1.2.  You can now use pinout tables to map top-level ports and signal names to FPGA pins, and specify pull-up, pull-down, and keeper circuits for FPGA I/Os.

     

    I've only tested FlaviaLP56 using JTAG, and only for LOGI-Pi rev R1.2.  It probably won't work for LOGI-Pi-2 (R1.5.1).  See the description at FlaviaLP56 rev 0.0p data files for details.

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  • johnbeetem
    johnbeetem over 10 years ago

    I just uploaded FlaviaLB56 rev 0.0p data files for the LOGI-Bone R1.0.  You can now use pinout tables to map top-level ports and signal names to FPGA pins, and specify pull-up, pull-down, and keeper circuits for FPGA I/Os.

     

    I've only tested FlaviaLB56 using JTAG, and only for LOGI-Bone R1.0.  It probably won't work "out of the box" for LOGI-Bone-2 (R1.5.1).  See the description at FlaviaLB56 rev 0.0p data files for details.

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