Challenge Objectives
1. My primary objective was to learn to use MicroBlaze soft processors with onboard GPIO and external sensors. The Arty S7 is an ideal platform to do that with its onboard user LEDs and switches and the 4 Pmod connectors and Arduino/chipKIT shield connector. I was able operate 4 different Pmods (PmodNAV, PmodOLED, PmodOLEDrgb, PmodBLE) and also utilize the internal XADC. I consider this objective successfully achieved although I did encounter some issues and have some unresolved problems that I'll discuss below.
2. Since most of the Pmod products are made by Digilent, I also wanted to learn to use their Vivado IP library (which contains example application code). I used these libraries for all of the Pmod programming that I did for this project. I had some minor issues, but without these libraries it would have taken a lot of effort to interface the displays and sensors. I plan to use other custom sensors in the future interfaced to the Pmod ports, so the Digilent IP are useful as a starting point for application development.
3. Complete all of the challenge activities - I believe that I accomplished that. A cross reference with links below.
- Write a blog comparing the differences between the Spartan-6 and Spartan-7 FPGAs. /technologies/fpga-group/b/blog/posts/comparison-between-spartan-6-and-spartan-7-fpgas
- Take our quiz. Done 5/8/2022
- Build a project with the Arty S7. /technologies/fpga-group/b/blog/posts/7-ways-to-leave-your-spartan-6-challenge---project-platform
- Ask/answer a question or start a discussion. /technologies/fpga-group/f/forum/51132/7-ways-to-leave-your-spartan-6-challenge---what-toolchain-version-are-you-using
- Add a sensor to your project. /technologies/fpga-group/b/blog/posts/7-ways-to-leave-your-spartan-6-challenge---add-ble-interface
- Use your ongoing project to create an experiment. /technologies/fpga-group/b/blog/posts/7-ways-to-leave-your-spartan-6-challenge---experiment-with-xadc and /technologies/fpga-group/b/blog/posts/7-ways-to-leave-your-spartan-6-challenge---external-vpvn-differential-input-working-with-xadc
- Write a summary blog on what you learned about the Spartan-7 FPGA. This blog.
4. Things learned about the Spartan-7 FPGA
- That the change in process node to 28nm enabled the Spartan-7 to achieve a 2X Relative Performance/Watt vs a Spartan-6 (45nm). Arty S7-50 runs without additional thermal mitigation (heatsink or fan).
- That the Spartan-7 lacks a high speed transceiver interface (Gb SerDes or PCIe). If required you need to move up to an Artix-7.
- The XADC is not available on the 2 smallest Spartan-7 devices (XC7S6 and XC7S15). I probably won't encounter these parts anyway.
- Only 210 of the 250 single-ended IO on the XC7S50 are available on the Arty S7-50 due to the CSGA324 package used.
Issues encountered
1. Digilent IP libraries are only up-to-date and verified with Xilinx 2019.1 tools. This led to some uncertainty as to which tool version I should use. I chose to use 2020.2 because I already had an Ubuntu 18.04 VirtualBox VM running the 2020.2 tools installed on my Win10 development PC. There was also a rapid sensor prototyping webinar on E14 that used 2020.1 tools: Arty-S7 Workshop: Part 3: Rapid Sensor Prototyping with Digilent Peripheral Modules. The webinar itself was very useful, but the link to the v2020.1 Digilent vivado-library did not work and I could not find any 2020 files anywhere on the Digilent repo. It was funny because I saw other references on the web to 2020 files, but a question answered on the Digilent forum indicated that those files don't exist. I ended up just using the 2019 files. Other challengers seem to have used more current tool versions with success, so I possibly made the wrong choice. Another interesting tidbit - the Digilent Pmod IP that I used was packaged using an Arty A7 rather than the S7, so Vivado will give you Critical Warnings which tutorials tell you to ignore.
2. Missing or broken file links associated with examples and webinars (see #1 above).
3. PmodBLE causes PmodNAV, PmodOLED, PmodOLEDrgb to not work. This is an interesting problem that I still have not solved. I started out just using the PmodNav and dumped data to the USB Serial port. I then added a PmodOLED and a PmodOLEDrgb to show the data and other text and images. I called this platform my Sensor Base design. Everything was working fine until I built another platform in Vivado that added the PmodBLE to the Sensor Base.. First, I had a problem in Vitis with the PmodBLE.h file not being found. So, I built a new platform in Vivado with only the PmodBLE and that worked and it could transfer data to and from the Serial Bluetooth Terminal app on my Android tablet. I later discovered that my original problem not finding the PmodBLE.h was caused by corruption on my hard drive. I replaced the hard drive and tried again using the platform that included all 4 Pmods. BLE was now working. I then tried to send PmodNAV data over BLE and also display the data locally on the PmodOLED. That did not work. I found the function to initialize the PmodNAV never returned. I then commented out the BLE code and the PmodNAV and PmodOLED were still not functioning. I then tried each Pmod individually in the code and the only one that would work was the PmodBLE. As an experiment, I tried unplugging the PmodBLE but the other Pmods still did not work. There is something about the PmodBLE in the hardware platform that causes the other Pmods not to work. I'm going to continue debugging after the challenge when I have more time. For my sensor experiment, I used the internal XADC with the PmodBLE and that worked.
4. Problems getting constraint files to associate board connectors to FPGA pins? Using the XADC was not without it's own issues. It worked fine with the internal temperature and power supply voltage sensors which do not require connection configuration. I wanted to try some external inputs to the XADC which do require configuration using the Vivado constraints file (Arty-S7-50-Master.xdc). I tried the first aux input configured as unipolar single-ended, but the ADC always read 1.5V regardless of what voltage I put on the A0 shield pin. I also tried the A15 pin configured as bipolar single-ended with the same result. Then, I tried the dedicated differential pair (VP/VN) and that worked. Another problem that I need to work on later.
Challenge Summary
As usual the challenge was a fun and enlightening event. Thanks to E14 and AMD-Xilinx for sponsoring the event and providing the Arty S7 FPGA Development Board.
The challenge was a bit more "challenging" than usual. There was the normal tool version compatibility issues with existing examples, tutorials and available IP. But, on top of that I had some hardware issues with my development computer. Late in the challenge I had intermittent hard drive problems and a failure (data not power) of a USB port. Extremely frustrating when doing application development because there is initial uncertainty whether the problem is hardware or software or both.
But, now I've got some hands on experience with the Microblaze and the Digilent Pmod IP. I'm looking forward to applying that knowledge with future work on 7 series and Zynq-7000 FPGAs (I have a PYNQ-Z2 and a MiniZed).