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Blog Summary for Arty S7-50 (7 Ways to Leave Your Spartan-6 FPGA : Summary)
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  • Author Author: cbohra00627
  • Date Created: 5 Aug 2022 6:11 PM Date Created
  • Views 49 views
  • Likes 2 likes
  • Comments 0 comments
  • 7 Ways to Leave Your Spartan-6 FPGA
  • spartan-7
  • cbohra00627
  • Spartan_Migration
  • spartan-6
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Recommended

Summary for Arty S7-50 (7 Ways to Leave Your Spartan-6 FPGA : Summary)

cbohra00627
cbohra00627
5 Aug 2022

FPGA was a completely new thing to me before participating in this program. I learned a lot of things while writing blogs for this program. The list of all the blogs is given below:

  1. Spartan-6 VS Spartan-7 (Comparison)
  2. Getting Started with Arty S7-50
  3. Implementing MicroBlaze based Microcontroller on Arty S7-50
  4. Interacting with DDR3 SDRAM on Arty S7-50
  5. Transfer data over UartLite on Arty S7-50
  6. Image Processing (Box Blur) on Arty S7-50 (Project)
  7. Working with XADC on Arty S7-50
  8. Image Processing (Box Blur) with multiple box sizes (Adding a sensor)
  9. Reducing time to send over UartLite (Experiment)
  10. Summary for Arty S7-50 (Summary)

My aim was to implement image processing on the Arty board. I divided my project into smaller subprojects. Then combined them into one single project.

  1. Spartan-6 VS Spartan-7: In this blog, I compared the basic feature differences between the Spartan-6 series and the Spartan-7 series FPGAs.
  2. Getting Started with Arty S7-50: In this blog, I showed how to use the constraint files in any HDL design to access various LEDs, switches and push buttons available on the board.
  3. Implementing MicroBlaze based Microcontroller: This blog shows the steps to create your first MicroBlaze based custom microcontroller. And also how to include the LEDs and the push buttons in your microcontroller design and access them in Vitis.
  4. Interacting with DDR3 SDRAM: The Arty S7 board has a 256MB DDR3 SDRAM on it. It can be accessed using the Memory Interface Generator (MIG IP) in the block design. And the memory locations can be accessed using the Xil_Out8() and the Xil_In8() functions in Vitis.
  5. Transfer data over UartLite: In this blog, I showed how to send data over serial terminal using the UartLite IP and access it on your PC.
  6. Image Processing (Box Blur): In this blog, I combined all the previous learnings together to create an image processing algorithm based on the Box Blur algorithm. Initialized an image as an array, the code processed this array and stored the blurred image into a new array and sent it to the PC over serial connection.
  7. Working with XADC: Spartan-7 have a builtin ADC. In this blog, I showed how to insert it into our design and use it to get analog data from an IR sensor.
  8. Image Processing with multiple box sizes: I added the XADC to my previous design for image processing and connected a sensor to the A0 pin on the board. Whenever the IR sensor senses an IR signal, it increases the box size by 1 (max value 3). Higher box sizes will produce more blurred images.
  9. Reducing time to send data over UartLite: In this blog, I tried to minimize the time taken for sending the blurred image from the board to the PC by minimizing delay. I also calculated the minimum delay required for the data to be successfully captured by the PC.

While writing these blogs, I encountered many errors. But one by one they got solved. The Xilinx forum and the E14 community helped a lot in resolving these errors. So, I would like to thank them for helping me out.

Anonymous
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