Enter Your Electronics & Design Project for a chance to win a $200 shopping cart! Back to homepage | Project14 Home | |
Monthly Themes | ||
Monthly Theme Poll |
Congratulations to dougw for The Logical Project! You are the winner of a $200 Shopping Cart and earn the Grand Prize Trophy Badge!
Congratulations to yesha98 for Prototyping with FPGAs - Final Project - Pong Game, zst123 for Vidor Music Jukebox, and navadeepganeshu for DigiStep: A digital stepper motor controller using PSoC4! ! You are the First Place winners of the $100 Shopping Cart and earn First Place Trophies!
The Digital Fever competition was a celebration of all things digital, from digital logic, giving programs the ability to make complex decisions, to FPGA, which can begin configured to do just about anything. Project could be anything that involves Digital Logic such as those involving FPGA, PLD, logic gate ICs, CMOS logic, TTL, DTL, discrete logic, etc. Like the 1s and 0s currently used to translate reality into the digital world, the I Ching (which may be as much as 5,000 years old) represents reality in the binary language of Yin and Yang. Yin and Yang are polar opposites and are often described in terms of male and female, light and dark, on and off, positive and negative. While binary code can literally be used to define images, numbers, letters, and music; according to the I Ching the universe is a constant mix and interaction between Yin and Yang and reality is an illusion. Could the illusory nature of augmented reality, artificial intelligence, and virtual reality in the digital world be supporting evidence of the illusory nature of reality itself?
The Grand Prize winner, The Logical Project , gave dougw a chance to have some fun while designing a circuit using Boolean Logic. yesha98 gave a great primer that explains as much as possible about prototyping using FPGAs, covering FPGAs (Field Programmable Gate Arrays), ASSP (Application-Specific Standard Product), ASICs (Application Specific Integrated Circuits), PLDs (Programmable Logic Devices), PLAs (Programmable Logic Arrays), GALs (Generic Array Logic), PLDs (Programmable Logic Devices), and CPLDs (Complex Programmable Logic Devices). He applies the concepts covered in his previous blogs to build a Pong game as his final project! zst123 did a MKR VIDOR 4000 project but decided not to touch the Arduino code anymore after bricking the WiFi module, and instead built his first project entirely in HDL, Vidor Music Jukebox. Rounding up the first place finishers was navadeepganeshu who found inspiration for his PSoC4 project from a roadtest review that he did on a Trinamic Stepper Driver Motor.
The runner up projects were also excellent and deserving as well. Attila Tőkés used the MKR Vidor 4000, is to build a basic Security Camera while also experimenting with hardware-accelerated video processing features like Motion Detection. The camera image is taken from a RaspiCam v1.3. A Project14 logo along with an internet synced timestamp are applied as overlays. The resulting image was outputted to the Vidor 4000's MicroHDMI port. He then used TUL PYNQ-Z2 to implement Hardware Accelerated Motion Detection. dubbie followed up CatDogFox #8 : No Cats but Some Nice Legs with Cat Counter MKIII. In the process, he found a way to declutter by making use of a whole bunch of simple TTL logic ICs from over 40 years ago when he first started messing about with electronics.
Without further Ado here are your winners.......
{tabbedtable} Tab Label | Tab Content | ||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
The Winners | The Grand Prize
The Logical Project by dougw:
dougw has always had a lot of fun designing digital circuits that used Boolean logic, but these days it is rare to see designs with lots of discrete gates. With this little project I'm going to have some fun designing a quadrature decoder and display using logic gates and flip-flops. It will actually use 9 inverters, 19 AND gates, 13 OR gates, 4 T flip-flops, and 2 SR flip-flops for a total of 46 logic devices. If it was implemented with TTL or 4000 series chips it could take a dozen chips, but in this project I will implement all of these gates and their interconnections in a single PSoC 4 chip listed at $2.52 by the manufacturer. The 44+ pin https://www.element14.com/community/view-product.jspa?fsku=&nsku=84Y4913&COM=noscriptPSoC 4 module below allows one of these chips to plug into a breadboard.
dougw shows the system in operation so it is clear what is being attempted and the components involved. He then describes the first (simple) quadrature decoder he devised by using a visual Basic program to simulate the circuit. VB6 is a great tool for quickly implementing this simulation since it is can be used as a visual object oriented, event driven language. Each gate and its inputs and output are all visual and the code is a simple one line indicating what happens to the output based on what the inputs are. The gate code is automatically executed whenever an input changes so the program does not need a state machine. If an output changes because an input changed, and this output happens to be the input to another gate, it will automatically trigger the gate code for that next stage. No real program planning is needed.
First Place Winners:
Prototyping with FPGAs by yesha98:
yesha98 is a University student who does a lot of work with FPGAs and Microcontrollers for Embedded System Design and IoT. In this blog series, he explains as much as possible about prototyping with the FPGAs and this leads to his final project, a game of Pong. ASIC stands for Application-Specific Integrated Circuit whereas FPGA stands for Field Programmable Gate Array. PLDs (Programmable Logic Devices) is a separate class of Integrated Circuits wherein the logic function of the IC can be programmed after its fabrication. It is the user's choice to implement any logic function into the PLDs. There are several types of PLDs: PROM, EPROM, and EEPROM. A programmable logic array (PLA) has a programmable AND gate array, which links to a programmable OR gate array, which can then be conditionally complemented to produce an output. A PLA is similar to a ROM concept, however, a PLA does not provide full decoding of a variable and does not generate all the minterms as in a ROM. PAL devices have arrays of transistor cells arranged in a "fixed-OR, programmable-AND" plane used to implement "sum-of-products" binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs. An improvement on the PAL was the generic array logic device, or GAL, invented by Lattice Semiconductor in 1985. This device has the same logical properties as the PAL but can be erased and reprogrammed. The GAL is very useful in the prototyping stage of a design when any bugs in the logic can be corrected by reprogramming. GALs are programmed and reprogrammed using a PAL programmer, or by using the in-circuit programming technique on supporting chips. PALs and GALs are available only in small sizes, equivalent to a few hundred logic gates. For bigger logic circuits, complex PLDs or CPLDs can be used. These contain the equivalent of several PALs linked by programmable interconnections, all in one integrated circuit. CPLDs can replace thousands, or even hundreds of thousands, of logic gates. An FPGA takes a different idea. It has a clump of simple, configurable logic blocks arranged in an array with interspersed switches that can rearrange the interconnections between the logic blocks. Each logic block is individually programmed to perform a logic function (such as AND, OR, XOR, etc.) and then the switches are programmed to connect the blocks so that the complete logic functions are implemented. In short, an FPGA is a device with a large number of configurable logic blocks (CLB) surrounded by a programmable interconnect to implement a user-defined logic function.
His first blog blog deals with implementing a full adder on a Spartan-6 FPGA from scratch with an overview of Verilog HDL programming styles. His next blog takes you through through the design of an 8-bit counter with a frequency divider in Verilog HDL to convert 50MHz into 1Hz clock frequency and implementation on a Cyclone IV FPGA. The aim of his next blog is to compare and analyze the performance of Shifters using Combinational Logic and Sequential Logic implemented on Artix-7 FPGA. His final project aims to build a simple Pong game (single player) by applying all the concepts learned in the previous sections of this blog. The input (user control) for the pong game will be via the Rotary Encoder and the output can be seen in the VGA Monitor.
Vidor Music Jukebox by zst123:
The Vidor Music Jukebox is Manzel's first project entirely using Verilog HDL. Before diving into the build process he discusses some setbacks that he faced. He was too adventurous and spoilt the Wifi module. When configuring the serial port RX/TX pins, he could communicate with the Wifi NINA module. After that, he added SPI pins and messed up the directions by assigning one of the pins in the wrong order. Due to his mistake, 2 output pins were directly assigned together and damaged the Wifi NINA module. Now the module does not respond anymore, it is completely dead. In the PCB schematic, the pins were wired directly from the FPGA to the Wifi Module without resistors. Maybe the Arduino team can improve on this and make it more fool-proof. If 2 outputs are configured together, a resistor should help to limit the current and prevent damage. Anyway, after ruining the Wifi module. he decided not to touch the Arduino code anymore, he'll make all the microcontroller pins into inputs (unused) and focus on FPGA in Verilog only.
DigiStep: A digital stepper motor controller using PSoC4! by navadeepganeshu:
navadeepganeshu had heard quite a bit about PSoC so he knew it was highly configurable and could be designed application-specific. He started thinking about what could be done using digital logic and incidentally came across this article on the Johnson Ring counter and its application in stepper control. This is something that he learnt about while doing his Trinamic TMC2300-IOT-REF Stepper Driver + Motor - Review and the waveforms of the johnson counter looked familiar to coil firing sequence in a stepper. So, it's fully digital and relating with PSoC, woot! It had a UDB(universal digital block) consisting of all basic digital gates and units. So he put up an idea to design it without really knowing how to implement it! Now, why to design another fully digital stepper driver? There are tons of trending chips by TI, ST, ROHM, Infineon and not to forget, the Trinamic etc like L298N, TMC2209, A4988, DRV8825 etc. But, these are mostly H-Bridge based, power-hungry and heat-bleeding. Yet are suitable and needed for high torque and control applications.
Here, he was looking specifically for 28BYJ-48 unipolar stepper motor and usage of the digital logic counter method to generate coil pulse sequence. Doing this would make the driver handy and easy to implement with a couple of flip-flops and logic gates. Putting it inside PSoC would be like a highly configurable driver and multiple ones can be designed inside one PSoC chip. No high heat dissipation, no exclusive driver chips like L298N is required and several driver logic can be implemented in a single PSoC chip(limited by GPIOs and UDB count though). This was a sort of a cool thing and he decided to go hardcore with PSoC and try to get it running. Also, he loved doing stepper driver the other way and thought it would be a good learning thing for my motor stuff addiction.
| ||||||||||||||||||||||||
The Runners Up | Runners Up:
The following members received first place votes.
SecuCam by Attila Tőkés:
Attila Tőkés did a couple of interesting projects that involved manipulating FPGA for video. The goal of his first project, which uses the MKR Vidor 4000, is to build a basic Security Camera while also experimenting with hardware-accelerated video processing features like Motion Detection. The camera image is taken from a RaspiCam v1.3. A Project14 logo along with an internet synced timestamp are applied as overlays. The resulting image was outputted to the Vidor 4000's MicroHDMI port. His next project involved using the TUL PYNQ-Z2 to implement Hardware Accelerated Motion Detection.
Cat Counter MKIII by dubbie :
When dubbie saw the topic of Digital Fever for the Project14 competition he reflected on what he might do. He remembered that he had a whole bunch of simple TTL logic ICs from over 40 years ago when he first started messing about with electronics. He had been intending to get rid of all those old electronic components and related stuff as he never used them and he wanted to de-clutter his garage. So he thought he might achieve two goals from the same activity: think of something to do with TTL logic and then once finished, get rid of everything. He put on my thinking cap and started to think. After a while he decided his thinking cap must have a flat battery as he was not having any ideas at all, not even bad ones. However, he persisted and eventually came up with the idea of using 74LS series ICs or anything TTL like, that he might have, to use a PIR to detect and count the cats coming into his garden. He had been attempting to create some kind of CatDogFox detector for some time, with a spectacular lack of success, so he thought, why not have another go and so Cat Counter MKIII was born.
|
In the comments below:
Top Comments