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Threads
556 Discussions
Frequently Asked
Sharing vivado projects
Not Answered
over 3 years ago
Vivado and Zynq: TRI-STATE help
Not Answered
over 4 years ago
i2c bus in zynq
Not Answered
over 4 years ago
Issue with blk_memory after design & wrapper
Not Answered
over 4 years ago
How to fix DMA initialization failure?
Not Answered
over 3 years ago
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Setting up CAN interface for Xilinx ZCU102
0
2152
views
9
replies
Latest
over 1 year ago
by
bugtech
Discussion
Zynq PS Spi and Quad Spi referance design tutorial Help
1003
views
0
replies
Started
over 1 year ago
by
brhn
Discussion
ZUB1CG board file or ref design, Vivado 2019.2 version
1050
views
3
replies
Latest
over 1 year ago
by
manihatn
Suggested Answer
Which NVMe does AES-ACC-HSIO-M2-G accessory board accommodate?
0
814
views
2
replies
Latest
over 1 year ago
by
iksevas
Discussion
Affordable Versal parts and their penetration in hobbyist circles
4946
views
15
replies
Latest
over 1 year ago
by
erik__18
Discussion
(solved) Did you manage to debug a Microblaze RISC-V with Vitis Unified IDE (2024.1) ?
4009
views
5
replies
Latest
over 1 year ago
by
Jan Cumps
Discussion
Vivado, Vitis and PetaLinux on Windows Sublayer for Linux (WSL2): solve xsdb segmentation fault
1943
views
1
reply
Latest
over 1 year ago
by
bidrohini
Discussion
Vivado, Vitis and PetaLinux on Windows Sublayer for Linux (WSL2): connect to the USB debugger as a normal user
691
views
0
replies
Started
over 1 year ago
by
Jan Cumps
Discussion
Vivado, Vitis and PetaLinux on Windows Sublayer for Linux (WSL2): attach and detach your USB debugger
1799
views
0
replies
Started
over 1 year ago
by
Jan Cumps
Not Answered
Get this on the dmesg "macb ff0e0000.ethernet eth0: Could not attach PHY (-19)"
0
1843
views
1
reply
Latest
over 1 year ago
by
bidrohini
Discussion
Install Vivado, Vitis and PetaLinux on Windows Sublayer for Linux
13165
views
13
replies
Latest
over 1 year ago
by
Jan Cumps
Discussion
in L3 Corner Track example. Why the flow buffer needs to be created everytime in loop?
459
views
1
reply
Latest
over 1 year ago
by
phoenixcomm
Discussion
Seeking Feedback on Your Preference for an AMD Kria Workshop
2541
views
14
replies
Latest
over 1 year ago
by
erik__18
Discussion
Development board to test my ASIC
569
views
1
reply
Latest
over 1 year ago
by
vmate
Discussion
Poll - I'm Planning an FPGA program for Fall 2024 - What Are your Preferences?
2168
views
11
replies
Latest
over 1 year ago
by
javagoza
Not Answered
Arty7 FPGA I not see the vauxp2 values they are only Z
0
346
views
0
replies
Started
over 1 year ago
by Former Member
Not Answered
When should I start programming with a board instead of Verilog sources on a processor
0
589
views
1
reply
Latest
over 1 year ago
by
javagoza
Discussion
storing large dataset on pynq z2 ddr memory
337
views
0
replies
Started
over 2 years ago
by
Hudda
Discussion
Are you looking for a Career Opportunity as an FPGA Programmer at AMD?
4571
views
10
replies
Latest
over 2 years ago
by
_david_
Discussion
Does anyone knows how to program the FPGA on Arduino Vidor 4000?
1290
views
4
replies
Latest
over 2 years ago
by
jc2048
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