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Threads
543 Discussions
Frequently Asked
Sharing vivado projects
Not Answered
over 2 years ago
Vivado and Zynq: TRI-STATE help
Not Answered
over 3 years ago
i2c bus in zynq
Not Answered
over 3 years ago
Issue with blk_memory after design & wrapper
Not Answered
over 2 years ago
How to fix DMA initialization failure?
Not Answered
over 2 years ago
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Discussion
Development board to test my ASIC
286
views
1
reply
Latest
7 months ago
by
vmate
Discussion
Poll - I'm Planning an FPGA program for Fall 2024 - What Are your Preferences?
1274
views
11
replies
Latest
10 months ago
by
javagoza
Not Answered
Arty7 FPGA I not see the vauxp2 values they are only Z
0
210
views
0
replies
Started
10 months ago
by Former Member
Not Answered
When should I start programming with a board instead of Verilog sources on a processor
0
315
views
1
reply
Latest
10 months ago
by
javagoza
Discussion
storing large dataset on pynq z2 ddr memory
212
views
0
replies
Started
10 months ago
by
Hudda
Discussion
Are you looking for a Career Opportunity as an FPGA Programmer at AMD?
3691
views
10
replies
Latest
11 months ago
by
_david_
Discussion
Does anyone knows how to program the FPGA on Arduino Vidor 4000?
728
views
4
replies
Latest
11 months ago
by
jc2048
Discussion
PYNQ-Z2 Base Overlay Video Modification
294
views
0
replies
Started
over 1 year ago
by
likeastar
Not Answered
PYNQ Z2 FPGA
0
711
views
4
replies
Latest
over 1 year ago
by
Saurav006
Discussion
How to use Vitis HLS IP in Python Pynq overlay Environment.
691
views
3
replies
Latest
over 1 year ago
by
flyingbean
Not Answered
Suggestions for designing with ZYNQ MPSoC UltraScale+ ZCU104: Using PS side DDR4 memory for storing trained weights and biases of Convolutional Neural Network(CNN) for implementation of CNN inference in real-time.
0
828
views
3
replies
Latest
over 1 year ago
by
JB58
Not Answered
GIC vs AXI Interrupt Controller
0
8905
views
10
replies
Latest
over 1 year ago
by
valeteBro
Discussion
UltraScale+ use OCM as shared memory between PetaLinux on A53 and Bare metal on R5
3323
views
4
replies
Latest
over 1 year ago
by
minimartian
Not Answered
How to Create Adder, LPF and HPF, Amplifier Circuits in FPGA LabVIEW
0
1233
views
9
replies
Latest
over 1 year ago
by
jc2048
Discussion
FPGA - Vibration Analysis
3803
views
44
replies
Latest
over 1 year ago
by
shabaz
Not Answered
Trying to generate a modern kernel dts for avnet-uz7ev-cc board.
0
996
views
7
replies
Latest
over 1 year ago
by
flyingbean
Not Answered
AES-FMC-MULTICAM4-G With a Single Camera?
0
418
views
1
reply
Latest
over 1 year ago
by
saadtiwana_int
Discussion
Learning resources
414
views
0
replies
Started
over 1 year ago
by
jovarela
Discussion
Spartan 6
1825
views
12
replies
Latest
over 1 year ago
by
dang74
Discussion
Updated BSPs for Designed By Avnet products
1411
views
4
replies
Latest
over 1 year ago
by
brianmckee
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