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536 Discussions
Frequently Asked
Sharing vivado projects
Not Answered
over 2 years ago
Vivado and Zynq: TRI-STATE help
Not Answered
over 2 years ago
i2c bus in zynq
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over 2 years ago
Issue with blk_memory after design & wrapper
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over 2 years ago
How to fix DMA initialization failure?
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over 2 years ago
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Arty A7- 35T DDR3 implementation in Vivado 2020.2
1788
views
7
replies
Latest
over 1 year ago
by
Jonathan101
Discussion
My Arty S7 board has killed three USB 3.0 ports on my Microsoft Surface Studio 2 computer.
3276
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23
replies
Latest
over 1 year ago
by
flyingbean
Discussion
Vivado Project Version control
542
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2
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over 1 year ago
by
ad0es
Discussion
Follow Up to the 7 Ways to Leave Your Spartan-6 Program: How Well Do You Like Working with the Spartan-7 FPGA?
1305
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3
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Latest
over 1 year ago
by
cbohra00627
Not Answered
Spartan 6 Connectivity issue
0
2544
views
16
replies
Latest
over 1 year ago
by
shabaz
Answered
How to write the contents of a text file to DDR RAM on the Arty S7-50 board (or any fpga)?
0
5698
views
12
replies
Latest
over 1 year ago
by
ehernand
Discussion
Simple FPGA/PCIe based SDR (Software Defined Radio)
4000
views
10
replies
Latest
over 2 years ago
by
ad0es
Discussion
How to boot Zynq using separate bitstream?
974
views
2
replies
Latest
over 2 years ago
by
fiedel
Discussion
Desoldered Spartan-6 FPGA - Free (gone)
1583
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8
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over 2 years ago
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Discussion
Pynq Version 3 released
911
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4
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over 2 years ago
by
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Answered
Arty S7-50 & Raspberry Pi through SPI
0
1627
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4
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over 2 years ago
by
tcmichals
Not Answered
reference design for AES-FMC-NETW1-G
0
402
views
0
replies
Started
over 2 years ago
by
sallwine
Discussion
How to add Microzed board in Xilinx ISE 11?
987
views
4
replies
Latest
over 2 years ago
by
sanabel
Discussion
The future of "FPGA only" chips compared to SoC and its impact on FPGA engineers
3389
views
13
replies
Latest
over 2 years ago
by
michaelkellett
Not Answered
Why a value assigned to a the "BASEADDR" memory location in BRAM getting assigned to its next memory location automatically?
0
1317
views
6
replies
Latest
over 2 years ago
by
cbohra00627
Discussion
Will Spartan-6 be totally left out migrating to Spartan-7 and further in series? Your thoughts?
987
views
4
replies
Latest
over 2 years ago
by
navadeepganeshu
Not Answered
Sharing vivado projects
+1
1418
views
2
replies
Latest
over 2 years ago
by
jure
Discussion
VHDL vs. Verilog: Which one do you prefer and why?
2097
views
8
replies
Latest
over 2 years ago
by
saadtiwana_int
Answered
Arty S7: Microblaze hello world - Memory Read Error, Microblaze instruction insert overrun
0
4135
views
8
replies
Latest
over 2 years ago
by
Jan Cumps
Discussion
FPGAs you can buy
2675
views
14
replies
Latest
over 2 years ago
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michaelkellett
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