yepe has to resolve this problem for a project assignment:
Hi Jan Cumps, I hope you don't mind if I ask a question regarding the PYNQ half-bridge PWM driver. I am working on a student project for school and I need to drive a half-...
Avnet has just released a series of projects that builds up Vitis-AI 3.0 and ROS2 enabled designs for Ultra96-V2 and ZUBoard.
Type
Description
ZUB1CG Links
U96V2 Links
Hackster 1
Building the foundational designs
https://avnet.me/...
Hi,
I am Arun. I am a hardware Engineer with 8years experience in in IoT and RF schematic and pcb design. I am new in FPGA design. How can I start my career in FPGA based design? Kindly advice the initial steps.
Introduction
This is still work in progress - I've only reached the simulation phase and haven't tried it on a device yet - but I thought it might be of some interest.
Back when I did my 'Making Waves' blogs [1], I implemented a fast, unrolled, pipel...
Introduction
In the previous blog, FPGA ADSR envelope generator for sound synthesis , we discussed ADSR envelope generators. The data input to the ADSR module was hardcoded. It would be nice to be able to enter the step increments wit...
ADSR envelope generator for sound synthesis.
In the previous blog we implemented a Direct Digital Frequency Synthesis module (DDFS ) that can generate an unmodulated audio-frequency tone. In this blog we will implement an ADSR (attack-decay...
DDFS - Direct Digital Frequency Synthesis
DDFS is a digitally-controlled method of generating multiple frequencies from a reference frequency source. DDFS is a method of producing a tunable digital or analog waveform. First the data points of the wav...
PCB Assembly
Within a couple of weeks of placing my order the boards arrive. I am a sucker for the white solder mask. It has a shine not unlike the keys of a piano and I like the way it contrasts with the black silkscreen.
I am not well ...
Decided to recreate the process of going from a vendor provided reference design to a first version of my project. I've literally gone thru more than a dozen iterations of this process to gain the knowledge of how to do it properly.
The vendor's refe...
In the screen grab I chose the COMPLETE set of files. It's huge, but was worth it considering how many attempts it took to finish a clean installation! Doing a complete installation also seems to eliminate some issues I had with the install wan...
I just posted this blog in my personal blog, which on reflection might not have been the best place.
So here's a link to it.
(because I can't see how to move it.)
Simple Dev board for Efinix Trion FPGAs
MK
Patiently Waiting for the PCBs
In these high-inflation times I try to be frugal where I can. I've ordered boards from China in the past and while the PCB prices themselves are very affordable the $20 or so for express shipping isn't nec...
Dear friend,
I am a new master's student, I need help with my master's project. I have a Digilent Arty - Artix-7 board. what kind of project I can research for 2 years?
Introduction
One of the advantages of membership in the Element14 community is the opportunity to evaluate brand new products and technologies. Back in 2021 during the summer of FPGAs I was lucky enough to be selected to road test the Oran...
Introduction
Some more simple DSP [digital signal processing] stuff with my lovely little Lattice Brevia-2 board with its XP2 FPGA.
A couple of years back, I did a collection of blogs called 'Waves' using this board (see the links at the end). For th...
Hello all,
I am not able to boot up the board even after following the steps exactly given in the manual. It seems that the board is not drawing any current as the fan which I am mounting on it is also not powering up and the PS red LED is also not g...
In this blog series, I attempt to bring two of my passions together … AI and rock climbing.
In the first blog, I defined some use cases for a camera capable of being aware of climbing activity.
http://avnet.me/rock-climbing-ai-part1
In the s...
Finishing up with combinational circuit design exercises in System Verilog. This time we are going to do exercises on another representation of numbers, BCD (binary-coded decimal format)
Table of Contents
Binary-coded decimal
1-digit BCD incremen...
We continue with combinational circuit design exercises in SystemVerilog. This time we are going to do exercises on number representation formats using a simplified floating point format.
Table of Contents
Floating point arithmetic
Simplified 13-bi...
RTL Combinational Circuit - Design Examples - Barrel Shifter RTL Combinational Circuit
We continue experimenting with RTL Combinational Circuits designed in SystemVerilog. In this blog we are going to design circuits around a very useful ci...
We have completed the 7 Ways to Leave your Spartan-6 FPGA Competition, sponsored by AMD Xilinx. Overall, we had 26 challengers, with 1 unsponsored challenger. Our judges have read all the blogs and scored them. In this blog, we will announce the Gran...
RTL Combinational Circuit - Design Examples - Hex-Digit to Seven-Segment LED Decoder RTL Combinational Circuit
We have been reviewing the main constructs and operators for designing combinational logic circuits with the SystemVerilog HDL. Let's apply...
In the previous chapter we reviewed some of the main SystemVerilog operators that allow us to describe the operation of combinational logic circuits. In this chapter we will review some of the SystemVerilog constructs that allow us to describe parts ...
I continue my series of notes on SystemVerilog as I learn. In this case I dedicate the study notes to Verilog operators as an introduction to combinational circuits. I'll cover always blocks and other routing constructs in a later blog.
Table of Con...
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