element14 Community
Search
Register
Log In
Site
Search
Log In
Register
Community Hub
Community Hub
What's New on element14
Feedback and Support
Benefits of Membership
Personal Blogs
Members Area
Achievement Levels
Learn
Learn
Ask an Expert
eBooks
element14 presents
Learning Center
Tech Spotlight
STEM Academy
Webinars, Training and Events
Learning Groups
Technologies
Technologies
3D Printing
FPGA
Industrial Automation
Internet of Things
Power & Energy
Sensors
Technology Groups
Challenges & Projects
Challenges & Projects
Design Challenges
element14 presents Projects
Project14
Arduino Projects
Raspberry Pi Projects
Project Groups
Products
Products
Arduino
Avnet & Tria Boards Community
Dev Tools
Manufacturers
Multicomp Pro
Product Groups
Raspberry Pi
RoadTests & Reviews
About Us
Store
Store
Visit Your Store
Choose another store...
Europe
Austria
(German)
Belgium
(Dutch, French)
Bulgaria
(Bulgarian)
Czech Republic
(Czech)
Denmark
(Danish)
Estonia
(Estonian)
Finland
(Finnish)
France
(French)
Germany
(German)
Hungary
(Hungarian)
Ireland
Israel
Italy
(Italian)
Latvia
(Latvian)
Lithuania
(Lithuanian)
Netherlands
(Dutch)
Norway
(Norwegian)
Poland
(Polish)
Portugal
(Portuguese)
Romania
(Romanian)
Russia
(Russian)
Slovakia
(Slovak)
Slovenia
(Slovenian)
Spain
(Spanish)
Sweden
(Swedish)
Switzerland
(German, French)
Turkey
(Turkish)
United Kingdom
Asia Pacific
Australia
China
Hong Kong
India
Korea
(Korean)
Malaysia
New Zealand
Philippines
Singapore
Taiwan
Thailand
(Thai)
Americas
Brazil
(Portuguese)
Canada
Mexico
(Spanish)
United States
Can't find the country/region you're looking for? Visit our
export site
or find a
local distributor
.
Translate
Profile
Settings
Technologies
More
FPGA
Forum
Blog
Forum
Documents
Quiz
Events
Polls
Files
Members
Mentions
Sub-Groups
Tags
More
Cancel
New
Join FPGA to participate - click to join for free!
Forum Actions
RSS
More
Cancel
Group Actions
Group RSS
More
Cancel
Threads
550 Discussions
Frequently Asked
Sharing vivado projects
Not Answered
over 3 years ago
Vivado and Zynq: TRI-STATE help
Not Answered
over 3 years ago
i2c bus in zynq
Not Answered
over 3 years ago
Issue with blk_memory after design & wrapper
Not Answered
over 3 years ago
How to fix DMA initialization failure?
Not Answered
over 3 years ago
Forum
By title
By last reply date
By thread date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions and discussions
Unanswered questions and discussions
Answered questions and discussions
Questions with suggested answers
Questions and discussions with no replies
Suggested Answer
Does anyone know some resources to improve the knowledge about Vivado, FPGA, AMD-Xilinx, Spartan-7, etc?
0
3102
views
11
replies
Latest
over 3 years ago
by
hrishi98
Discussion
How To set up Vivado on MacOS
10511
views
7
replies
Latest
over 3 years ago
by
Andrew J
Suggested Answer
Arty S7 50 rev. B IO Standard issues
0
1994
views
5
replies
Latest
over 3 years ago
by
jugal
Answered
Vivado installing on Windows without admin
0
7689
views
11
replies
Latest
over 3 years ago
by
Jan Cumps
Discussion
Hackster.io "Level Up Tech Series" features the Spartan-7 FPGA family
926
views
1
reply
Latest
over 3 years ago
by
computerton
Not Answered
How to fix DMA initialization failure?
0
2125
views
0
replies
Started
over 3 years ago
by
Ben1988
Not Answered
Issue with blk_memory after design & wrapper
0
1337
views
2
replies
Latest
over 3 years ago
by
Hag911
Not Answered
i2c bus in zynq
0
1650
views
2
replies
Latest
over 3 years ago
by
nygren
Not Answered
Vivado and Zynq: TRI-STATE help
+1
15665
views
31
replies
Latest
over 3 years ago
by
jc2048
Discussion
petalinux 2021.1 BSP builds but core dumps when booting
1827
views
3
replies
Latest
over 3 years ago
by Former Member
Discussion
Testing a VHDL LCD matrix display driver
5527
views
9
replies
Latest
over 3 years ago
by
Jan Cumps
Not Answered
Avnet scripts 2021.1 - Vitis error
0
1953
views
6
replies
Latest
over 3 years ago
by
bartokon
Discussion
Warning Given XMD transaction timeout value is invalid. Using default value of 60000 milli seconds?
2109
views
1
reply
Latest
over 4 years ago
by
Arnaud
Discussion
I'm looking for solutions for wide band SDR in HF and VHF frequencies bands
1527
views
2
replies
Latest
over 4 years ago
by
tuancoiz4
Answered
Stereo Processing - What would you like to see covered ?
0
1534
views
2
replies
Latest
over 4 years ago
by
albertabeef
Not Answered
MRAM Access using Virtex5 FPGA
0
820
views
0
replies
Started
over 4 years ago
by
cool998
Answered
FPD Link-III vs GMSL2 for cameras at a distance from FPGA
0
9888
views
3
replies
Latest
over 4 years ago
by
saadtiwana_int
Suggested Answer
selection of an FPGA
0
1133
views
1
reply
Latest
over 4 years ago
by
michaelkellett
Answered
What is the thick lines indicate and thin lines indicate in below picture?
0
1816
views
5
replies
Latest
over 4 years ago
by
shabaz
Suggested Answer
FPGA: trigger on both flanks of a clock to toggle output
0
2133
views
4
replies
Latest
over 4 years ago
by
genebren
<
>
