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550 Discussions
Frequently Asked
Sharing vivado projects
Not Answered
over 3 years ago
Vivado and Zynq: TRI-STATE help
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over 3 years ago
i2c bus in zynq
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over 3 years ago
Issue with blk_memory after design & wrapper
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over 3 years ago
How to fix DMA initialization failure?
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over 3 years ago
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How to write the contents of a text file to DDR RAM on the Arty S7-50 board (or any fpga)?
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7743
views
12
replies
Latest
over 2 years ago
by
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Discussion
Simple FPGA/PCIe based SDR (Software Defined Radio)
5679
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10
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Discussion
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1303
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over 3 years ago
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Discussion
Desoldered Spartan-6 FPGA - Free (gone)
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1296
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by
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Answered
Arty S7-50 & Raspberry Pi through SPI
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2108
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over 3 years ago
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tcmichals
Not Answered
reference design for AES-FMC-NETW1-G
0
478
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0
replies
Started
over 3 years ago
by
sallwine
Discussion
How to add Microzed board in Xilinx ISE 11?
1232
views
4
replies
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over 3 years ago
by
sanabel
Discussion
The future of "FPGA only" chips compared to SoC and its impact on FPGA engineers
4820
views
13
replies
Latest
over 3 years ago
by
michaelkellett
Not Answered
Why a value assigned to a the "BASEADDR" memory location in BRAM getting assigned to its next memory location automatically?
0
1856
views
6
replies
Latest
over 3 years ago
by
cbohra00627
Discussion
Will Spartan-6 be totally left out migrating to Spartan-7 and further in series? Your thoughts?
1363
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4
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Latest
over 3 years ago
by
navadeepganeshu
Not Answered
Sharing vivado projects
+1
2272
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2
replies
Latest
over 3 years ago
by
jure
Discussion
VHDL vs. Verilog: Which one do you prefer and why?
3220
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8
replies
Latest
over 3 years ago
by
saadtiwana_int
Answered
Arty S7: Microblaze hello world - Memory Read Error, Microblaze instruction insert overrun
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5734
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8
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over 3 years ago
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Discussion
FPGAs you can buy
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8927
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3795
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Discussion
Arty S7 rev B vs Arty S7 rev E? Somewhat confused.
5718
views
16
replies
Latest
over 3 years ago
by
phoenixcomm
Not Answered
Zedboard - Vitis project works randomly
0
1830
views
1
reply
Latest
over 3 years ago
by
saadtiwana_int
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