Blog

  • [PP-07] Lab 4 - Usage of Tool Command Language commands in Vivado

    kk99
    The lab 4 gives us basic knowledge how to use Tool Command Language commands in Vivado e.g. to create scripts which could execute several steps.Main points of this lab:- TCL commands for open/close block designs,- simple TCL commands to manipulate IP...

  • [PP-06] Lab 3 - Configuration of MIO peripherals and generation of test applications

    kk99
    The Lab 3 is continuation of previous Lab. In this part we will learn how to set up additional peripherals like QSPI, USB and SD. From the SDK point of view we will learn how to use example test applications. First step is customization of Zynq ...

  • Xilinx ZYNQ - Blog 3 - Adding USB and Flash to the Cortex-A9 Processor System

    shabaz
    Note: This is part 3 of a series on working with FPGAs and in particular the Xilinx Zynq-7000S Programmable System-on-Chip with ARM Cortex-A9 processing core. For all parts, click here: Path to Programmable  For part 1, click here: Xilinx ZYNQ S...

  • Hello World with Minized

    mu.udhay
    First of All , Sorry for long Pause Guys ! I missed you So much I would Make sure to Pace up with the Rest ASAP. Installing Xilinx Vivado in Linux: First of All , Get Ready with Required Tools:Xilinx Vivado(2017.4 or Later version only) , E...

  • [PP-05] Lab 2 - Configuration of Processing System

    kk99
    The main purpose of lab number 2 is configuration of the Zynq processing system to use UART peripheral to run example Hello World application. 1. Enabling and configuration of a UART peripheralThe Zynq SoC has MIO pins divided into two banks: Ba...

  • Week 3: Thermal Imaging Test of MiniZed FPGA

    snidhi
    Out of curiosity, I decided this weekend to spend some time to measure the heat distribution on the Minized FPGA board and compare it to another fpga board. For this measurement I used the FLIR ThermoVision A20M 60Hz 160 x 120 Infrared Thermal Imagin...

  • Path to Programmable - Blog 4 - TCL, AXI, DMA, BRAM

    rsc
    The MiniZed training is getting more complicated.  Several new items have been discussed including TCL, AXI, DMA, and BRAM.  Lab 3 objectives:This lab is designed to set up the hardware configuration in Vivado and the SDK for the actual com...

  • [PP-04] Lab 1 - building a basic Zynq design

    kk99
    The main purpose of this lab is to illustrate how to create a new Zynq project using UltraFast Design Methodology within Vivado Webpack. Zynq Proccesing System (PS) has a configurable set of built-in peripherals and direct access to Programmable...

  • [PP-03] Lab 0 - setting up a developemnt platform for Zynq

    kk99
    The main purpose of this laboratory is configuration of environment for the development. It based on Windows PC environment and have three main steps:- downloading and installation of Xilinx Vivado WebPACK,- downloading and installation of Tera Term,...

  • Lab 4 - TCL me Xilinx

    mconners
    Lab 4 - Using TCL in Vivado Embedded Designs This lab was pretty simple, the goal was to exercise the Vivado environment via the command line using TCL. TCL is the Tool Command Language. It was invented by John Ousterhout at UC Berkeley in 1998....

  • Xilinx ZYNQ - Blog 2 - Getting Code Running on the SoC

    shabaz
    Note: This is part 2 of a series on working with FPGAs and in particular the Xilinx Zynq-7000S Programmable System-on-Chip with ARM Cortex-A9 processing core. For part 1, click here: Xilinx ZYNQ System-on-Chip - Getting to know the MiniZed Board For ...

  • Week 3: Done!! Lab3 Lab4 and Lab5

    snidhi
    In this week; I also completed Lab 3, Lab 4 and Lab 5. The objectives of these labs were also very well written and rather simple to follow. These labs are a continuation from previous labs which can be found here  Lab 3 Lab 4 Lab 5 Conclu...

  • Lab 2! And some more project updates...

    aspork42
    About:Through Xilinx and Element14, a training program to learn about the Zynq 7000 platform which is System On Chip combining an FPGA with an ARM processor. This comes to the students as complete development board packed with goodies like a wireless...

  • Week 2: Done!! Lab 0 Lab1 and Lab2

    snidhi
    Introduction Lab0 Lab1 Lab2  Introduction As I had already mentioned in my application I have worked with FPGAs in the past for 2 years roughly including my masters thesis with the old Xilinx ISE. So I kind of have a basic sense of ...

  • Lab 3 - Processing System Configuration and MIO Peripherals

    mconners
    Overview : This lab is similar to the previous lab, we configured some additional peripherals, export to the SDK, and exercise the newly created peripherals.   Notice in the above diagram, there are checks next to UART 1, GPIO, SD...

  • Lab 1 - starting the first Zynq project

    aspork42
    Path To Programmable - Lab 1 About:Through Xilinx and Element14, a training program to learn about the Zynq 7000 platform which is System On Chip combining an FPGA with an ARM processor. This comes to the students as complete development board p...

  • I'm back! And I got Vivado installed :)

    aspork42
    Well I had to spend a week on-site with a customer and another week at a trade show; but I'm back! I'm happy to report that I got Vivado 2017.4 installed. I followed the instructions in this "experiment" to install the dev envi...

  • Field Programmable Gatecrasher

    Fred27
    So, I'm not one of the Path to Programmable trainees, but I decided to get a MiniZed and try to follow along with everyone else's blogs. I'm a hitchiker on the Path to Programmable. Anyone care to join me? I'm hoping that there will be enough in...

  • [PP-02] First run of the reference Linux distribution

    kk99
    The PetaLinux provides a reference Linux distribution which is integrated and tested for Xilinx devices. This distribution includes:- boot loader,- CPU-optimized kernel,- Linux applications and libraries,- Debug,- Thread and FPU support,- Web server ...

  • Path to Programmable - Blog 3 - First Light

    rsc
    Here are the objectives for the first few labs:   The instructions were very clear, although I'm not sure of all the why yet, I managed to output some ASCIIThe lab pdfs link to a 790pg technical reference manual for your reading pleasur...

  • Xilinx ZYNQ System-on-Chip - Getting to know the MiniZed Board

    shabaz
    February 2023: Note: This blog post series was originally written in 2018, however, it is still usable as of February 2023 and hopefully onwards. The screenshots are from an older release of Xilinx Vivado software tools, however, the difference is ve...

  • Finally got the Board

    mconners
    OK, the board finally arrived, although a day later than expected, due to Hurricane Michael, fortunately the storm hit quite a bit to the west of me, so I am not dealing with hurricane aftermath.   This was a nice little guide to the b...

  • Module 1 - Lesson 1

    dotmish
    P2P – Module 1 – Lesson 1 Notes Introduction This is an introductory video that is about 9 minutes in length.  The training is branded as AVNET “Speedway”, and is taught by Josh Foster.  The module 1 objectives are: Understan...

  • Module 1 - Overview

    dotmish
    Module one includes a series of video lectures.  Here's the overview:  There are a total of 11 video lectures: I will be posting my notes for each of the video lectures.

  • Week 1: MiniZed ZYNQ Concept and basics

    snidhi
    While I am reading the necessary Dokus I thought it would be a good idea to look into some basics of the MiniZed FPGA board and what it offers to the users and potential programmers. When compared to other suppliers FPGAs development board such ...