Table of Contents
Introduction
The Design Flow
Blocks and Interfaces
Hardware Implementation
Vitis Implementation
Using Processing IDE
Demo Clips and Video
Code and Resources
Also Read: PathtoProgrammable3 training blogs
Introducti...
Introduction
Hi everyone! In this blog I will show you my final project of the "Path to Programmable III" challenge. This idea was inspired from the project published by Adam Taylor: Mini But Mighty, the MiniZed and Vitis for Motor Control....
Because I have used Vivado before, I thought the HW training will go easier and quicker than SW training for Vitis, which was the first time I have used it (more than trying to see what it is all about and what it has in addition to the Xilinx SDK). ...
Because I have used Vivado before, I thought the HW training will go easier and quicker than SW training for Vitis, which was the first time I have used it (more than trying to see what it is all about and what it has in addition to the Xilinx SDK). ...
Install AMD-Xilinx Vitis Core Development Kit in your system:
1. Go to https://www.xilinx.com/support/download.html and download setup file
2. Install the software with required features
3. Open Vitis 2023.1
4. Choos...
I am an analog engineer, so the signals I acquire and process from different sensors end up at A-to-D converters; I'd like to have authority going from there. I plan to market my patent in a medical electronic area, so I decided to learn about FP...
Hello everyone,
My interest in this contest is to learn about the current state of FPGAs and how I can apply it to the field of Artificial Intelligence. I'm also curious about the possibility of running a RISC-V core on the board. Last year I had the...
Introduction
For my path-to-programmable project I have been planning to work on a project that involves live video processing. For this reason, I applied for the Ultra96-v2 FPGA because the ZU3EG FPGA inside has quad A53 cores which are fairly capab...
All my previous blogs have been mostly experimenting with Vivado, Vitis and Petalinux tools for design and implementation as the training material has be based on it. I planned the final Training blogs to try an image processing application on ultra9...
Peta Linux Technical Training Summary
Course objectives
Install the Peta Linux Development Environment
Fundamentals of The Peta Linux -Yacto
Application Creation for Peta Linux User Level
Lesson 1: Introduction & Overview
What is Peta-lin...
Software Training
Lesson 6: Connecting Hardware and Debugging
Summary of Lesson6
Ultra96 V2 Hardware Explanation
How to Debug the application using RUN configuration
Setup for Processor initialization, RESET, Download Bit steam, Terminal ...
Introduction
I could have done so much more with the Ultra96v2 board, I stuck with the theme of LED blinking through different ways and although it is not too fancy, one thing that I have noticed is that I spend too much time when it comes to creatin...
All the blogs that I have written till this point has been based on the Flash boot. In this blog, I am going to investigate the process of rewrting the Flash image with some custom applicatoin images that I am generating with the Vitis tools an...
1. Introduction
In this last part of the series, we are going to run a simple CNN model in our Ultra96v2 after we quantize and compile it for the board. The CNN is trained on MNIST and the original plan was to identify the test number using the CNN a...
1. Introduction
In this blog, we will extend our previous LED blinking example to again blink more LEDs. We will see how we can use PYNQ to program our FPGA. In this design, we will use the low speed expansion header in the Ultra96v2 board to connect...
1. Introduction
In the last blog, we just used the Processing System (PS) side to blink the 4 user programmable LEDs, so we will build on that and see how we can incorporate the PL side LEDs and extend our design to use both the PS and the PL. In thi...
1. Introduction
In this blog, we will use the Processing System (PS) side to blink the 4 user programmable LEDs that are available in the Ultra96v2. This is a really simple introduction to how we can initialize the Zynq US+ block in the Vivado design...
In the previous blog we discussed about the different types of Boot modes available in the Minized. In this blog I will be going a bit more detail into the flash based booting, looking into the default partitions, erasing a partition, validating that...
Table of Contents
Objectives
Motivation of the blog
Build Lab 9 Vivado HW Project
Conclusions
References
Objectives
MiniZed TTC HW design Lab 9 is the final class for my MiniZed training path. I am going to review AMD Vivado HW flow on h...
Introduction
The software training part was focused mainly on creating and using a standalone platform. Xilinx tools were supposed to be able to create a platform running an RTOS or Linxus OS. I was curious how easy is to create a platform using an R...
Table of Contents
Introduction
The Design Flow Simplified
Adding interfaces (Pmod NAV, TFT LCD, HTU21D)
Project Constraints File
Software Implementation
Demo Video
Introduction
Coming to the last training blog, its amazing to realize how vas...
Understanding Minized Hardware Design The Minized board was pre-configured with a demonstration project that showcase its capabilities and provide users with a starting point for their own projects. This example design demonstrated a fully...
Using libraries in Vitis
This blog starts from the training for the Software part described in Lab 10 Libraries.
The lab describes how to use a library in Vitis by selecting a library from those provided for created BSP. In the lab it is taken ...
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