Almost a year ago, I received a very nice surprise from e14. Unfortunately, until now it sat aside, waiting for some love. This is going to change soon!
The board
The CMOD S7 from Digilent is a very nice little board, fitted with a Spartan 7 FPGA…
Introduction
In the previous blog, FPGA ADSR envelope generator for sound synthesis , we discussed ADSR envelope generators. The data input to the ADSR module was hardcoded. It would be nice to be able to enter the step increments with knobs for each…
ADSR envelope generator for sound synthesis.
In the previous blog we implemented a Direct Digital Frequency Synthesis module (DDFS ) that can generate an unmodulated audio-frequency tone. In this blog we will implement an ADSR (attack-decay-sustain…
DDFS - Direct Digital Frequency Synthesis
DDFS is a digitally-controlled method of generating multiple frequencies from a reference frequency source. DDFS is a method of producing a tunable digital or analog waveform. First the data points of the waveform…
RTL Combinational Circuit - Design Examples - Barrel Shifter RTL Combinational Circuit
We continue experimenting with RTL Combinational Circuits designed in SystemVerilog. In this blog we are going to design circuits around a very useful circuit that…
RTL Combinational Circuit - Design Examples - Hex-Digit to Seven-Segment LED Decoder RTL Combinational Circuit
We have been reviewing the main constructs and operators for designing combinational logic circuits with the SystemVerilog HDL. Let's apply…
In the previous chapter we reviewed some of the main SystemVerilog operators that allow us to describe the operation of combinational logic circuits. In this chapter we will review some of the SystemVerilog constructs that allow us to describe parts of…
I am learning SystemVerilog HDL. I started reading the book FPGA Prototyping By SystemVerilog Examples . These are my study notes and what I am learning about SystemVerilog. My idea is to do exercises with the Digilent Arty S7 50 board obtained in the…
In this post we describe how to build a l ow resolution thermal imaging camera with VGA output. The solution is based on the Melexis MLX90640 IR Array , the Digilent's PmodVGA module, and the AMD-Xilinx Spartan-7 FPGA of the Digilent Arty S7 50 board…
This is the summary of my participation in the "7 Ways to Leave Your Spartan-6 FPGA" program.
Listing and categorization of blog posts for the Spartan program
I have published 13 blog entries with 11 different projects. I've added a temperature and…
Our Artybot already controls motors via PWM signals and has rotational speed and motor position feedback via magnetic sensors, can "see" colors and has a user interface with switches , buttons , r ed LEDs, RGB LEDs and an OLED display . In this tutorial…
Introduction
When I decided to participate in the "7 Ways to Leave Your Spartan-6 FPGA" contest, I knew it would take a lot of effort. The board is a really great piece of technology and it was an opportunity for me to get acquainted with FPGA technology…
This is a continuation of my previous post . If you haven't seen it yet, I would strongly recommend taking a look, since we'll be continuing from where we left off. Everything mentioned and used in the project is located in my GitHub repo .
Previously…
Yesterday while loading a new bitstream to the Arty S7 50 rev. B the board turned off. At first I thought it was the board, I powered it via USB with a power bank and the board worked. So I tried all three USB 3.0 ports on the computer, a Microsoft Surface…
In this post I will introduce the Emubot project. Emubot is a simplified Logo turtle developed on the AMD-Xilinx Spartan-7 FPGA of the Digilent Arty S7 board. This simplified Logo turtle protoype with a Pmod OLED display module is aimed at children and…
In this post I describe the Bot Application Framework that I have prepared for the Digilent Arty S7 based bot and provides an overview of the Arty S7 Bot Application Framework , its architecture, components, and usage model.
This post is part 7 of my…
For the 7 Ways to Leave Your Spartan-6 program I am writing a series of tutorials using the Arty S7 50 . In the previous blogs I did two introductory tutorials to create a simple hardware-only project and another baremetal one on a MicroBlaze softprocessor…
In this tutorial we will learn how to create a custom AXI4 Lite IP Peripheral implementing a tachometer. We will add two quadrature encoders with Hall effect sensors to the mini plastic gear motors of the ArtyBot. The tachometer will enable the robot…
Arch Linux is a simple, versatile, and easily customizable GNU/Linux distribution that adheres to the principle of simplicity. And, Arch Linux can run on a Genesys ZU-5EV development board, and this project will show you how to implement the hardware…
In the previous blogs in this series for the " 7 Ways to Leave Your Spartan-6 " program we learned how to use the AMD-Xilinx Vivado and the AMD-Xilinx Vitis . We used Vivado for creating hardware designs for the Arty S7 board with a Hardware Design Language…
For the 7 Ways to Leave Your Spartan-6 program I am writing a series of tutorials to explore the possibilities of the Arty S7 50 board. In the first tutorial we explored creating hardware-only projects without using pre-built IPs. In this tutorial we…
I received the Digilent Arty S7 50 Board for the 7 Ways to Leave Your Spartan-6 FPGA program. In this blog I describe what the first power up of the board is like and then a small tutorial on how to create your first Hardware-Only design.
"7 Ways…
Hello everyone.
Yesterday I received Arty S7 Board for the 7 Ways to Leave Your Spartan-6 FPGA contest.
Board is offered available in two variants differing in FPGA. We received the better variant with Spartan XC7S50 FPGA featuring 52160 logic cells…
Within the Avnet 'Zed' Community, we spend a lot of time talking about SoC's with hard-core processors. The original ZedBoard started it all with a Zynq-7000 device with ARM A9. We've also done a lot with Zynq UltraScale+ family and ARM A53 (UltraZed…
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