FPGA - element14 Community

Tria Vitis Platforms — Adding support for ROS2

albertabeef

Introduction This project is part 5 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the…

4 months ago
FPGA
Blog

Tria Vitis Platforms — Adding support for Vitis-AI 3.5

albertabeef

Introduction This project is part 3 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the…

5 months ago
FPGA
Blog

Tria Vitis Platforms - Creating a Common Platform

albertabeef

Introduction This project is part 2 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the…

5 months ago
FPGA
Blog

Tria Vitis Platforms — Building the Foundational Designs

albertabeef

Introduction This project is part 1 of a 5 part series of projects, where we will progressively create AI enabled platforms for the following Tria development boards: ZUBoard Ultra96-V2 UltraZed-7EV These projects can be rebuilt using the…

5 months ago
FPGA
Blog

How can I choose FPGA?

Former Member

Hi, I am Arun. I am a hardware Engineer with 8years experience in in IoT and RF schematic and pcb design. I am new in FPGA design. How can I start my career in FPGA based design? Kindly advice the initial steps.

over 2 years ago
FPGA
Blog

Stereo Calibration for the Dual Camera Mezzanine

albertabeef

Introduction This blog post provides details on how to perform stereo calibration for the Ultra96-V2 development board with Dual-Camera Mezzanine. Getting Started with the pre-built image If you want to re-build the vivado…

over 2 years ago
FPGA
Blog

New! Use Linux ConnMan to Configure Ultra96-V2 WiFi

narrucmot

Hi Everyone! New with the PetaLinux 2021.1 BSP for the Ultra96-V2 is the addition of the ConnMan connection manager software application to configure and maintain the WiFi connection. What is ConnMan? It is a Linux software daemon (connmand) for managing…

over 3 years ago
FPGA
Blog

Ultra96-V2 Dual Camera Design for 2021.2

albertabeef

Introduction This blog post provides details on how to build and execute the new 2021.2 design for the Ultra96-V2 development board with Dual-Camera Mezzanine. Design Overview The following block diagram…

over 3 years ago
FPGA
Blog

3 Tips You Should Know Before Developing a Xilinx PCB

bhfletcher

Our team at Avnet is working on a new design now. As we go through the various review stages, I was reminded of something that every engineer developing a PCB with Xilinx should know. Tip #1 -- Use Xilinx Documentation Navigator Of course, every engineer…

over 3 years ago
FPGA
Blog

schematics for AES-ACC-U96-JTAG

sb0

Hello, Could someone from Avnet publish the schematics of the AES-ACC-U96-JTAG JTAG pod for Ultra96, or at least the technical information required to make it work with OpenOCD or other open source JTAG solutions? If not, are there alternative JTAG and…

over 4 years ago
FPGA
Forum

Summer of FPGA, Workshop 4: Elaborating on creating custom IP

Andrew J

Introduction Workshop 4 of the Summer of FPGA series for the Ultra96-V2 board went through a design for using the Mezzanine Click board. It was covered 'at pace' and this blog is my jottings on the steps taken, specifically elaborating on creating and…

over 3 years ago
FPGA
Blog

New! Avnet Boards Xilinx Solutions Guide

narrucmot

Hello! Looking for a new Xilinx SBC to play with or the best Xilinx Zynq or Zynq UltraScale+ SOM to use in your product? Can't decide what Avnet SOM or SBC is the best fit for your application? Avnet has just published a new Xilinx Solutions Guide: Avnet…

over 3 years ago
FPGA
Blog

Summer of FPGA, Workshop 4: Elaborating on the workshop design

Andrew J

Introduction Workshop 4 of the Summer of FPGA series for the Ultra96-V2 board went through a design for using the Mezzanine Click board. It was covered 'at pace' and this blog is my jottings on the steps taken, specifically elaborating on some of them…

over 3 years ago
FPGA
Blog

Ultra96-V2 UART Without USB JTAG/UART Module

narrucmot

Recently a, Ultra96-V2 user on the 96boards support forums asked the question " I was wondering if it was possible to connect to the UART directly via jumper leads? Anyone do this? " This is a good question, and it got me thinking. If you don't need the…

over 3 years ago
FPGA
Blog

Using Avnet Build Scripts to Build a PetaLinux BSP (2020.1 and later)

narrucmot

This is an update to the popular Using Avnet Build Scripts to Build a PetaLinux BSP (2019.2 and earlier) blog post. Like the Avnet HDL github repository of build scripts, IP, etc. for building the Vivado projects that are the hardware foundation for customers…

over 3 years ago
FPGA
Blog

Avnet HDL git HOWTO (Vivado 2020.2 and later)

narrucmot

This is an update to the popular Avnet HDL git HOWTO (Vivado 2020.1 and earlier) blog post. You may know that Avnet provides PetaLinux BSPs and other reference designs for the Xilinx Zynq and Zynq UltraScale+ Zed SOMs (MicroZed, PicoZed, and UltraZed…

over 3 years ago
FPGA
Blog

Bring your AI projects to the Edge with Xilinx Vitis-AI and win $500 !

albertabeef

Interested in implemented AI at the edge with the Avnet platforms ? Check out my new designs for Vitis-AI 1.3, the latest edge AI solution for Xilinx based platforms. Vitis-AI 1.3 flow for Avnet Vitis platforms This project provides detailed instructions…

over 4 years ago
FPGA
Blog

Go Go Speedtest®︎! Testing WiFi Internet Connection on Ultra96-V2

narrucmot

We've talked in this blog space and elsewhere about testing WiFi performance for the Ultra96-V2 Ultra96-V2 board on a LAN using iperf3. It is a very handy and useful test, but it only tests local (WLAN) throughput. What about if you are developing an…

over 4 years ago
FPGA
Blog

Recent Fixes to PetaLinux QEMU Boot for Avnet SOMs and SBCs

narrucmot

It recently came to our attention at Avnet that PetaLinux QEMU boot was broken for our MicroZed SOMs, and possibly also broken for PicoZed, UltraZed, MiniZed, and Ultra96-V2. After spending some time to dive in and debug this problem we discovered that…

over 4 years ago
FPGA
Blog

Big Changes Coming for Avnet git Repos for Zeds, UltraZeds, and Ultra96-V2

narrucmot

We are currently working on PetaLinux 2020.2 BSPs for the Avnet MicroZed, PicoZed, and UltraZed SOMs and MiniZed and Ultra96-V2 SBCs As part of these BSP updates we are also taking the time to make some much needed and overdue changes to the HDL, PetaLinux…

over 4 years ago
FPGA
Blog

I know big, but how big? A look at hard drive space with Avnet SOMs

drozwood90

HI all, As I was working through updates for the 2020.2 release, I thought it might be useful to release some information about how much space you need to build. I worked through a chart of information and hope you can pick through the data and create…

over 4 years ago
FPGA
Blog

Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions

ctammann

I'm going to borrow heavily from my colleague Tom Curran and his excellent HDL howto blog ( Avnet HDL git HOWTO (Vivado 2020.1 and earlier) ). I highly recommend reading through that blog before continuing. I will modify it as needed to help you build…

over 4 years ago
FPGA
Blog

Wired Ethernet Choices for Ultra96

narrucmot

As you may already know, the Avnet Ultra96-V2 Ultra96-V2 single board computer does not have a wired Ethernet port on the board. That means if we want higher Ethernet data throughput than the on-board WiFi can provide we need to go exploring for options…

over 4 years ago
FPGA
Blog

2020.1 Vitis Repo Changes!

drozwood90

Hi all, In preparation for my next Vitis blog, "Learning Vitis 5 Getting started with a custom Vitis Platform" we had been wrapping our heads around Vitis and what it means for you! Taking feedback from the field and trying to consider what an end user…

over 4 years ago
FPGA
Blog

Enabling USB Gadget Ethernet on the Ultra96-V2

narrucmot

You have an Ultra96-V2 board, but want more data throughput than the on-board WiFi can provide. What do you do? A USB-to-Ethernet adapter ( USB 3.0 GbE adapter USB 3.0 GbE adapter ) is inexpensive and provides excellent throughput, but requires a wired…

over 4 years ago
FPGA
Blog