Instructions on how to add the board to Vivado.
This allows you to create projects and custom FPGA bit streams for it.
image source: customer action video after completing the instruction video of Cathal McCabe listed at the end of this post.
In the Vivado project creation wizard, there is a possibility to prime your design from a board definition.
You don't need to find out what the exact FPGA is, and what hardware is available.
There are more project preparation tools. Constraint files and TCL files that fully define the board with all possibilities enabled.
This post focuses on the board definition.
Get the board file
Install and register the board in Vivado
Then there are two options.
- (deprecated) Directly put the files in the Vivado boards folder: <Xilinx installation directory>\Vivado\<version>\data\boards\board_files.
- Or (preferred) put them at a location you decide, and add a line to the Vivado init file, %APPDATA%/Xilinx/Vivado/init.tcl (create it if it does not exist)
set_param board.repoPaths [list "D:/Xilinx/pynq-z2/A.0"]
I used the 2nd option. You have to restart the editor.
The result is that you can now create projects that have the right FPGA info for the Pynq-Z2:
My goal for this week is to replicate this exercise from Cathal McCabe from the Pynq community:
I attached the project to this post, and the jupyter notebook.
I changed some things:
32 bit GPIO instead of 64
A reset input for the Johnson Counter module
Translated the Verilog Counter code to VHDL.